Advice on PC Based Logic Analyzer

8 channels is too low for a logic analyzer 16 is a minimum 34 is far enought

you must count $500 for a complete logic port with some grabbers...!

I never heard of this annie-usb before... but saw a lot of people around here happy with their logicport

so...make your choice !

--
Jean-Yves.

What I like about the Annie-USB is that it comes complete with SMD grabber clips that optionally would cost some extra money. If you have the time go to

It retails just below $500..My only concern thou is that it sports only 8- channels. However they have a nice little article on their website about evaluating logic analyzers and I must say that I agree with this article in that I will rather buy 8 'good channels' with sufficient buffer depth than 32 channels and anyway not be able to use them all.

The faq article is at:

#6

I've talked to some people and most of them said that I should opt for sufficient buffer depth. What is the feedback of those happy okes using logicport?

(snip)

I fully agree with Jean-Yves, 8 channels is definitively not enough for a logic analyzer. Put it this way : If you need only 8 channels then very probably a decent 4-channels scope will be enough, and you will use such scope far more often than your logic analyzer. However if you have a REAL problem that actually needs a logic analyzer then you will need at leat

20-30 channels. Just thinking at the tasks for which we have switched on our TLA704 in the past 2 or 3 years we always used more than 8 channels. Even for the last use (debugging of a GPIB interface) we needed 8 channels for data plus 8 channels of control lines. Cheers, Robert

the logicport has a compression algorythm so that he can record days of datas. it only records when the data changes. the annie usb record also when the data dont change which is a waste of buffer... and definitely 8 channels is not enought

the logicport with 34 grabbers (and channels) is around $500

the sufficient buffer depth is to compare with old logic analyzers that had only some ko of memory and that are unusable today. the logicport has enought.

--
Jean-Yves.

Eight are useful, 16 are better, and 32 (or more!) are occasionally necessary. Like many things in life: "It depends."

The traditional need for 32 channels would be a 16-bit address bus,

8-bit data bus (or 8 A + 8 D + 8 A/D shared), plus a handful of control lines. That enables one to trace a program's flow of instruction and data fetches, jumps, etc. Typically one would trigger on a specific instruction-fetch address and then examine the following behavior. This kind of analyzer often came, or could be provided, with the ability to interpret and display the assembler equivalents for the captured data.

In the microcontroller world, however, generally the address and data busses are contained within the processor core, so the analyzer is relegated to watching the general-purpose I/O lines and the ports used by peripherals. Much of the time, eight is indeed enough. But, if one is managing operations on a chip with multiple 8-bit ports and a handful of serial peripherals, one runs out of probes pretty quickly.

Consider that a 1 Mbit buffer will be filled by a 10 Msps clock in only 100 msec. If everything being examined by the analyzer is in the same time scale, that may not be a problem but that 1 Mbit could turn out to be far too short to look at fast events that are separated in time.

A smaller buffer that incorporates transitional sampling does a great job in capturing narrow but widely separated events. I usually sample at 100 MHz and can easily look at related events separated by hundreds of msecs (or longer).

There are times (no pun intended...) when there's a "lot going on" and simply triggering on the easy target, e.g., first rising edge, would fill the buffer before the event of interest. In that case, all that's needed is to delay the trigger based on an edge count or time.

--
Rich Webb     Norfolk, VA

On Apr 15, 2:01=A0pm, Jean-Yves wrote:

ml#6

That is true. It only records when data changes, But when your data never changes why do you need a logic analyzer, and when your data actually changes even at a moderatly freqency your little buffer would fill up in no time. Come on, if data compression was the epiphany solution, why would any developing company at all offer you a deep sampling buffer. Data compression is much cheaper to develop and manufactured. Quote article in Evaluation Engineering. "Lossless signal compression is included in this product because its basic memory depth is 2,048 S/channel. To conserve memory, the LA1034 only records data transitions. Lossless data compression relies on redundancy within the data, which can be encoded to reduce storage requirements. The amount of compression possible depends on the nature of the data. For example, the LA1034 datasheet quotes a 233:1 maximum compression ratio or a factor of greater than eight billion. This degree of compression is possible for a signal starting with a single logic 1 followed by eight billion zeros. If your signals typically consist of a few fast pulses with lots of dead time, compression can be very useful. However, for very active signals with a large number of transitions, the effective compression ratio will be small. The reason Logicport offers data compression rather than a larger sampling buffer is that they only use the little onboard memory available in the single FPGA in their instrument. (Quote article in Evaluation Engineering) "The LA1034's logic and memory are entirely contained within a single FPGA," commented Harrison Young III, company CEO. "This keeps the speed up and the cost down compared with products having external memory interfaces. The LA1034's efficient lossless compression algorithm allows its buffer depth to be greatly extended with no loss in signal integrity."

Makes sense to me. Larger buffer makes even more sense