Any Cypress FX2 (USB) gurus out there?
I have one of these devices on an FPGA board (Digilent Nexys), which only provides an 8-bit external datapath instead of 16 bits. I'd like to stream substantially wider words (32, maybe 48 bit) to a PC application.
Could anyone provide some clarity on what mechansims exist to synchronize the byte-wide data to application word boundries? Is there something I can do to insure that each USB packet begins on a word boundary?
The boundry locations are readily available to the FPGA code, the question is how to communicate that information to the USB engine - is there a way to force creation of a new packet?
Obviously in-band signalling for data framing remains an option, but I would very much like to avoid resorting to that.
Thanks for any ideas - I haven't given up on figuring this out from the data sheets & manuals, but given their length it's not going quickly.