Hi, I have a powerpc embedded system, in it there is a sdram chip on the bus, if I run memory test on the sdram and the test program is loaded from powerpc cache, the test passes. But if I use the debugger through JTAG for powerpc to load the program into sdram, the debugger just halts there. Without going into the details, could you think of any reason for this? I am sure the debugger is fine... What memory test program does is read/write, what debugger does is also read/write, seems there are some subtle difference between the two way, but can not figure out. Any light?
- posted
19 years ago