Which processors are considered an i586

Is there an offical map between processors and the terms i386, i486, i586, etc?

Thanks...David

Reply to
David A. Ferguson
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Good old Pentium would have been i586. Intel decided to change the name to Pentium.

Sandeep

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Reply to
EventHelix.com

What's the context in which the terms are being used? (e.g. configuring gcc? Just talking in general?)

IN GENERAL the difference between i386 and i486, as far as code generation goes, is optimization-only. Nothing will break if you choose i486 code generation for an i386 target. The Intel Pentium added several features, but the one that tends to break code for backwards compatibility is the TSC - not that most programs need to use it; nor is it anything directly to do with the compiler, but if you compile for 586, OS kernels and some low-level software might assume it's there and build in features that require it. If your CPU has a TSC, it's safe to use "i586". i686 originally meant Pentium Pro.

It's hard to be very specific here because the "ix86" terms are not used 100% consistently. If you are trying to relate these terms to non-Intel CPUs, there is such a wide variety that it's an extremely difficult problem - and needs to be examined on a case-by-case basis. For example, NatSemi's Geode is "kinda" an i686 but "kinda" an i486 too. Non-Intel CPUs frequently have features that nominally place them at level "x" in the Intel hierarchy, but these features are actually grafted onto an "x-1" core which might not fully meet the requirements of configuring your software for Intel level "x". And AMD is now enough of a force that it has its own proprietary feature enhancements fairly well supported by third parties.

Unless I've misread your question, I think you should better ask "what target to I select when compiling [product name you're using] for [x] processor?"

Reply to
Lewin A.R.W. Edwards

Not quite true --- i486 has a builtin FPU, i386 only has an FPU if you mount it, separately. That's quite a serious difference.

Most compilers have broken off this choice to a separate switch though. I.e. the "486" switch won't automatically turn on FPU usage, and thus code compiled that way may still work on an 386.

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Hans-Bernhard Broeker (broeker@physik.rwth-aachen.de)
Even if all the snow were burnt, ashes would remain.
Reply to
Hans-Bernhard Broeker

That's not the whole story. There were 486DX and 486SX. One of them had the FPU disabled.

Michael

Reply to
Michael Hofmann

And some very strange IBM clones - 486BL3 which was essentially a clock-tripled 486SLC but it took a *387*DX FPA rather than the usual Intel "stick a *proper* 486 on there and call it a 487" approach!

I had one for a while - quite a snappy machine for integer work, a bit of a hound for FP stuff!

pete

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Reply to
Pete Fenelon

IIRC, not just disabled, but not present on the die. I considered mentioning the SX, but then I though it wasn't worth it. To paraphrase a statement from the GCC docs, "you don't want to know about the 486SX.".

The 486SX was essentially a stillborn. AFAIK, it never got much hold in the market, and rightly so. It didn't offer enough benefit over the i386 to be worth using, while it cut out the single most important new feature of the i486.

While the decision to make the 486SX was already somewhat dubious, the acoompanying 487SX was IMHO the silliest idea Intel *ever* cast into silicon, by a wide margin. It was actually a full-blown 486DX in a slightly altered case and pin-out. You could run a PC with only the

487SX in place, replacing the 486SX, i.e. the supposed "main CPU", by just a couple wires strung across its socket!
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Reply to
Hans-Bernhard Broeker

Since the i486 family includes the i486SX, that isn't necessarily true. I believe SX-vs-DX (in the non-clock-multiplied versions) were approximately 0.75 SX for every DX, though I don't recall where I originally read this statistic.

Right. I am not aware of any compiler where these options are merged. Can you mention one? Using hardware FPU is _always_ an optional switch in all compilers I have ever used.

Reply to
Lewin A.R.W. Edwards

i486 processors were also made with the FPU disabled - can't recall the intel name for these.

They also made the DX2 versions that were supposed to run clock doubled. When we replaced the plain vanilla 486 in some intel built multibus-2 boards with DX2s the application benchmarks were worse, we thought that this was because the benchmarks were data move intensive (graphics block moves) and so nearly all operations resulted in a cache miss.

Ian

Reply to
Ian Okey

Other differences:

BSWAP CMPXCHG INVD, INVLPG, WBINVD (cache invalidation instructions) XADD

BSWAP may be the biggest compatibility problem, though CMPXCHG and XADD are very useful in shared memory multiprocessor systems. None will probably be used unless you specifically ask for them through compiler intrinsics. BSWAP is useful enough in network code (because network byte order is backwards ;-) that network code may test for it and use it (hidden behind hton and ntoh).

Regards,

-=Dave

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Reply to
Dave Hansen

----- Original Message ----- From: "Lewin A.R.W. Edwards" > What's the context in which the terms are being used? (e.g. > configuring gcc? Just talking in general?)

My interest is general. When building software I have always use i586 and so far things have worked. I just felt like there was this master chart of CPUs that *everyone* else had.

I found list of intel processors at:

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I just picked some ixxx numbers. Is there an offical table like this somewhere or do these look correct?

1985 386 i386 1989 486dx i486 1993 Pentium i586 1995 Pentium Pro i686 1997 Pentium II i686 1998 Pentium II Xeon i686 1999 Celeron i686 1999 Pentium III i686 1999 Pentium III Xeon i686 2000 Pentium 4 i786 2001 Xeon i??? 2001 Itanium i??? 2002 Itanium 2 i??? 2003 Pentium M i686

I am mostly interested in the terms as they apply to linux rpms.

Mapping to non-intel CPUs would be nice but I can't seem to find an offical mapping to intel CPUs.

I am ok as far as getting work done. I just KISS it and always use i586. It is just that not *knowing* the offical mapping has been buggin me more and more lately.

Thanks for the info.

Cheers...David

Reply to
David A. Ferguson

The Blue Lightning 486BL3 was the successor to the 486SLC, but was substantially different. The 486SLC was a 386-derived not-quite-a-486 processor with clock multiplication and on-chip cache. It was pin-compatible with the i386SX (i.e. 16-bit data bus) and was designed to drop into i386SX designs for faster performance at lower cost.

The BL3 was another weird oddball beast, this time a "486-class" (but not 486!) clock-multipled processor in, as I recall, an i386DX-compatible package. Very bizarre.

I ran OS/2 on a 486SLC2/66 for a while; Alaris made those motherboards, they were very cheap and quite good. I was working at a computer store at the time and had a lot of time to experiment with them. Unfortunately it was prone to lockups - a known problem with OS/2 on that CPU due to some missing functionality.

Reply to
Lewin A.R.W. Edwards

Legend has it that the 486SX was originally a 486DX in which the NPU failed factory testing and was laser-disabled at the factory. In later revisions, it was physically omitted.

Hmm. Not what I had read. Also, now I come to think of it there is a

486SL (low-power model for laptops), which definitely WAS a maverick chip :)
Reply to
Lewin A.R.W. Edwards

That's correct.

The 486SX was not stillborn - it was shipped in millions of PC's (in fact, Packard-Bell was a huge buyer of the little beasties).

"SX" generally stood for "sux" in our opinions ... the 486DX was a very nice little processor in the pre-Pentium days.

Oh, and Geode is nothing like a Pentium Pro, which someone else said was an i686. Pentium Pro was basically a mutant RISC-CISC machine, nice architecture, but had problems getting the clock speed up. It was created as the first chip to respond to PowerPC, with Windows NT in mind

Ah, the old days ....

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Reply to
Alan R. Weiss

[...]

Correct up to this point.

Those two are still 'i686'. There is not yet such a thing as a i786, and there may never be one, now that Intel has announced to be dropping the for good, and concentrating on the P4M and IA64 instead.

IA64. No particular relation to the x86 lineage. If any, they're i686'es, too.

Yep.

In those, it's probably safe to assume that the number given there is a direct copy of the -march= or -mcpu option passed to GCC.

The full story cannot be captured in a single digit, of course. For that, you'ld have to look at the full CPUID data. Or, for easier access, at /proc/cpuinfo of your friendly neighborhood Linux kernel. E.g. you might want to know if there's an FPU, and if it supports MMX, and if so, which version of it?

--
Hans-Bernhard Broeker (broeker@physik.rwth-aachen.de)
Even if all the snow were burnt, ashes would remain.
Reply to
Hans-Bernhard Broeker

[...]

Correct up to this point.

Those two are still 'i686'. There is not yet such a thing as a i786, and there may never be one, now that Intel has announced to be dropping the ordinary P4, and concentrating on the P4M and IA64 instead.

IA64. No particular relation to the x86 lineage. If any, they're i686'es, too.

Yep.

In those, it's probably safe to assume that the number given there is a direct copy of the -march= or -mcpu option passed to GCC.

The full story cannot be captured in a single digit, of course. For that, you'ld have to look at the full CPUID data. Or, for easier access, at /proc/cpuinfo of your friendly neighborhood Linux kernel. E.g. you might want to know if there's an FPU, and if it supports MMX, and if so, which version of it?

--
Hans-Bernhard Broeker (broeker@physik.rwth-aachen.de)
Even if all the snow were burnt, ashes would remain.
Reply to
Hans-Bernhard Broeker

To be more exact, the pentium pro, with it's ability to do out of order instruction execution is considered the 686.

The pentium II, III, and IV are just faster P-Pro's. Not enough has changed to warrant modified compilation.

Reply to
TCS

Legend is wrong. While it's not impossible that a few of the original

486SXs did, in fact, have defective FPUs, almost all were, in fact, perfectly ordinary 486s with the FPU simply disabled. Intel saw a chance to do a little market segmentation, and took it. That's all. This is no different than the 32 bit-only 'Hammers that AMD is shipping to HP.

Later Intel actually physically removed the FPU from the 486SX dies. Whether that was originally planned (I'm sure it was at least a contingency) or not I don't know, but Intel clearly decided it was going to make enough 486SXs to recoup the costs of a respin with a (probably) 15-20% lower manufacturing cost per chip.

Reply to
Robert Wessel

The P4s (Netburst) cores are radically different designs than the P6 (P-Pro through P-III) cores, nobody considers them part of the same family. The Pentium-Ms (Banias/Dothan) are arguably in the P6 family, but with major surgery. And note that the P4M is a P4, and is *not* the same as a P-M.

Reply to
Robert Wessel

Most compilers consider the i486 and i386 to be the same chip with respect to code generation. In certain circumstances, the i486 can get a noticable performance boost if you optimize for the Pentium (i586).

Pentium optimization replaces certain complex instructions with equivalent sequences of simple instructions which will execute in parallel in the Pentium's dual pipelines. Although it has only a single pipeline, the i486 can also execute many of these simple sequences faster than their equivalent complex instructions.

For loops that fit within the primary cache the i486 can realize up to a 10% increase in performance. MMV with bigger loops depending on the presence and performance of the secondary cache.

Typically I have found no harm in compiling the whole i486 application using Pentium optimization - most programs benefit to some degree from better loop performance and I have never had a program run slower overall for using it.

George ============================================= Send real email to GNEUNER2 at COMCAST o NET

Reply to
George Neuner

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