When will the 8051 and othe 8-bits go away?

Note this pie was revenue, not units. On Units, the 8 bit is way out in front.

4 bits is relatively stable at ~ 1B/yr 32 bit units is growing faster than 8 bit, but 8 bit is still a long way from any plateau.

There is no dominant uC, like there is a dominant PC CPU device.

That's why marketdroids in 3 different companies claim to be #1 :)

They also use their own yardsticks - eg bundling non-binary compatible cores into one basket [helps get the numbers up...]

80c51 is easily, and by far, the most sourced core.

It was/is optimised for single-chip embedded control, and so is not going away any time soon. Things like interrupt priority, atomic boolean opcodes, register back switching, direct memory opcodes, all factor in this. As an 8 bit opcode device, it also has an opcode ceiling, so for larger-data tasks, something else could be a better choice.

If you want to look at the device space above ~44 pins, and above ~64K, then yes, there is a growing standard device there, called ARM.

One key driver: it is also multi-sourced.

-jg

Hello Paul,

I'll second the others who said they are here to stay.

With respect to the 8051 family: AFAIK that is the only family where at least the simpler versions are second sourced. That is a huge advantage and this fact alone almost guarantees a long product life. It is also one reason why I used the 51 in some designs where clients needed to be able to build them for more than a decade.

Some stuff will simply keep going. Not just in the uC world. There are airplanes in daily use which are powered by 70 year old engine designs.

How many times has the CD4000 series been declared to be near death? I still design with these, new packages were offered, prices are low, everything is well with them.

Regards, Joerg

Power conservation is necessary, especially in small battery operated devices. Every gate changing state (in CMOS logic) is pumping capacitor charging current from Vcc to gnd. Doubling the address width at least doubles the power consumption for that buss. It also adds to the expensive pin count.

So I see no point to wide addresses where the application does not require them. A large proportion of the embedded systems in the world are quite happy with an 8 bit (or smaller) address buss. Proper use of high level languages insulates much software from nasty hardware considerations. The governing factor will be cost.

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The above is the important point -- address space size vs. data size. 64-bit data operations don't help your word processor very much (if at all).

Give them a chance. The next release of Windows will probably require at least 16 TBytes of memory just to boot!

Guy Macon wrote in news: snipped-for-privacy@corp.supernews.com:

8 bit controllers have so many 16 bit functions that they should be considered as 16 bit ones. There are no true 8 bit controllers out there. Compare the AVR (marketed as 8 bit controller) with the MSP430 (a true 16 bitter). No much difference in performance and needed code space.

The 8051 is (and will be) popular as subcontroller in special function IC's. E.g. Nordic 24E1 a 2.4GHz tranceiver with integrated 8051. The 24bit-ADC's from TI, Analog Devices and so on....

8 bit controllers will never be out of market.

M.

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:-) Don...

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No just a 3d card with min of 32MB but recommended to have 128MB or higher(same as OS X)

1GB graphics cards are just around the corner.

Possibility that next version of windows may require a 64bit processor.

Alex

10s of uA? A few years back I made a design which included an MSP430 micro (IIRC Flash needs more power than mask programmed), a voltage regulator (PS was 9V), a reset controller and some chicken feed (pullups!) and it consumed less than 5 uA. Running from a 32kHz crystal, always in active mode. 32KHz are still typical for watches. They're small and they're cheap.

Steven

...

Hmmm... reminds of something I put on my website in 1996 from a posting in 1995 to a very different newsgroup....

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Back in the late 70s, TI watches drew 2 uA, and ran off of 32kHz. I would expect that that there has been a lot of improvement since then.

-Hershel

I wonder what's the breakdown of different devices within each category. Most of the 8-bit range is surely 8051.

What bugs me about this article (and even this thread) is the lack of mention of DSP's - 16-bit fixed-point DSP's thesedays just happen to be microcontrollers with DSP CPU cores. They're probably not the majority of the 16-bit market, but I wonder what the percentage is.

As for the future, I don't see where certain bus widths will survive or go away (the bus is all internal in most microcontrollers anyway), but perhaps some "paradigms" will go away. For example, the idea of separate 8-bit and 16-bit microprocessor-only chips (Z80,

68000) have gone away with the ability to put so much more on a chip, and it only survives with the more powerful 32-bit processors for general-purpose "desktop" computers. Even those may have cache ram and such onchip nowadays.

-----

Maybe it should be 10s of nA ?

Regards Anton Erasmus

Present state of the art is seen in the better RTC chips, and

250-500nA is the operate current, to run the Xtal OSC and spin a timer.

The limit has more to do with Osc start times, Board leakage, and real XTAL characteristics, than any silicon parameter.

Watches have to add the stepper energy to that.

-jg

The DP8500 Raster Graphics Processor had a central processing unit with 16 bit slave units and with 32 of them you had a 512 bit databus. DIAB Data (now focusing on compilers) built such a system already in

1988...

Graphics processors now have 128/256 bit (I think) databusses and parallel units integrated.

There are some VLIW DSPs around with 128 bit instructions.

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Yes, but back in the late 70s watches had so few functions that they didn't need a uC; a few counters + a few gates would do. That's a saver too.

Maybe in powerdown mode, osc off. In most apps with a 32kHz xtal not really a good idea, as a 32kHz osc can take quite some time to become stable.

would

An RTC is a good option if you can afford one, which I couldn't in the design I mentioned. It allows you to leave the osc running at low power, and have the uC in powerdown mode. The RTC timer could wake up the uC at regular intervals, uC is up and running within microseconds, executes a few instructions and goes back to sleep again. But even then 10nA is really low.

It would be quite hard to build crystal oscillators at extremely low frequencies, the 32768 Hz was chosen as a compromise between the resonator size and the power consumption.

In a CMOS frequency chain, the power dissipation is directly proportional to the frequency due to the stray capacitances.

Thus, a frequency divider chain consisting of several flip-flops in series, the first flip-flop will consume 1/2 of the chip power consumption, the next 1/4 and the next 1/8 and so on.

However, if a uC is used, the obvious idea would be to run the processor at the full 32768 Hz frequency, but this would increase the power dissipation considerably, thus charging and discharging a huge number of stray capacitances all over the chip, while in a simple frequency divider chain, the main (1/2) power dissipation would be in the first flip-flop.

To get really low system power consumption, the 32 kHz crystal frequency should first be divided with a trivial frequency divider chain to a lower value and then run the entire uC core at that frequency (at say 1024 or even 64 Hz). There will be a very limited number of instructions that can be executed at such clock rates, but a simple stopwatch application should not need too many instructions.

Paul

How many controlsignal does your application need? Yes, there is the one-wire debug, that means you need at least 3 pins for a working device and perhaps 4 pins for a debugable working device.

You could even aditionally multiplex a bunch of analog inputs and outputs over the very same pin and thus offload the IO to an external chip.

However when the sum price of the external IO chip and the cpu counts, one rather spends a few additional pins for the cpu and have the IO integrated.

Rene

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