VLIW ASIP

Hello all,

Please, check one or more of the following which can be classified as ASIP based on VLIW.

[ ] TI C6x [ ] Agere/Motorola StarCore [ ] Sun MAJC [ ] Fujitsu FR-V [ ] ST Lx [ ] Philips TriMedia

Thanks in advance,

Michele

Reply to
Michele Russo
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Please do your own homework.

Reply to
Jim Stewart

It is a pity that nobody in this ng is able to reply to this question.

At any rate I adjure that I'm not a student!

Regards,

Michele

Reply to
Michele Russo

That's because you didn't give enough information to answer it. For example, what definition of VLIW do you use in your paper? It is clear that Multiflow was a VLIW (28 instructions per cycle), but when does a LIW become a VLIW (or EPIC for that matter)?

If you can also tell us how wide each the above architectures are, we will have enough information to answer your question.

Wilco

Reply to
Wilco Dijkstra

Thank you very much. My paper is about design space exploration of VLIW architectures for embedded systems. In the related section of my paper, I would like to present a list of commercial VLIW targeted for embedded system which can be also classified as ASIP. I'm not sure that the aforementioned VLIWs can be classified as ASIPs and for this reason I wrote to this ng.

More precisaly this is the sentence I wrote in my paper:

ASIP based on \emph{Very Long Instruction Word} (VLIW) architectures~\cite{fisher_isca83} are emerging in the embedded domain, especially for multimedia and communication appplications. Examples include the TI C6x family, the Agere/Motorola StarCore architecture, Sun's MAJC, Fujitsu's FR-V, ST's HP/ST Lx, Philips' TriMedia. Architectures based on VLIW processors are currently seen as answering the demand for modern, increasingly complex embedded multimedia applications, given their capacity to exploit high levels of performance while maintaining a reasonable trade-off between hardware complexity, cost and power consumption.

A reviewer of the paper states that "My understanding is that the processors listed on page 2 are not actually ASIPs."

What do you think?

Regards,

Michele

Reply to
Michele Russo

I'm not convinced the architectures you mentioned can all be categorized as VLIW in the first place. For example calling 64-bit instruction packets VLIW is a bit of a stretch.

But what about codesize?

If you use a wide definition then most of them are not ASIP as they were intended as general purpose CPUs geared towards DSP. With a narrow definition obviously none are ASIPs. Crusoe is a good example of a ASIP VLIW.

Wilco

Reply to
Wilco Dijkstra

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