Hi there,
I am actually trying to develop an FPGA design with EDK 6.3 to work on a Spartan-3 Starter board with a Digilent NET1 Ethernet Module connected to one of the expansion ports. I have included an opb_eternetlite core on my hardware design to access control of the ethernet module. Could anoyone explain which ethernetlite net ports should de included in the design and which should be declared external? About the external ports, how should these be declared in the .ucf file? Has anybody acheieved interfacing the external NET1 module correctly on an EDK design? I woud be very grateful for any advice on this respect.
Thnakyou in advance.
Adrian.