Hi everyone,
I'm just about to start an implementation of a USB 3.0 interface in VHDL for data transfer from FPGA to a PC and vice versa. The core should acts as a USB device for the PC. The core is intended for an FPGA projects where an "easy" interface to a PC is needed. Higher data rates as defined by the 3.0 standard should be possible with the implementation.
Questions are:
Does anyone have experience in implementing a USB interface?
What are the external chipsets and components respectively required?
What about standard compliance? Which standard? Which version?
What is the defference between USB Server + USB Client in this respect and which one should I implement to get the desired functionality?
Thank You Friends For All Your Kind Support!