uP w/ dest synced DMA to external bus peripheral

A decade after my last 80186-based product, I need a uP that can DMA from RAM (internal or external) to a parallel bus peripheral (GPIB - yeah, I know: who uses GPIB anymore?) but I don't see modern chips with this capability. What I'm talking about is a DMA controller that can be configured to do the following:

0) external device signals DREQ 1) uP finishes whatever instruction it's in the middle of 2) uP releases the bus to the DMAC 3) DMAC reads from source (RAM, or another peripheral) 4) DMAC writes to the destination address (peripheral de-asserts DREQ) 5) DMAC releases the bus 6) uP goes about its business until the next DREQ assert

It's a very low-overhead method to dump huge data to/from a peripheral that may be constrained by the outside world to take/give data at arbitrary times. So far, I've looked at Blackfin and Coldfire. Maybe they can do it, but I haven't seen it in the data sheets. Their DMA engines look fine at shoveling data internally, but where's DREQ? What am I missing?

TIA, Bob

Reply to
Bob
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The M32C family can do this, but I don't see how the external peripheral knows when the new data is there. Its DMAC engine can be triggered off an external interrupt, and copy the new data to a GPIO register.

Since all the peripherals are memory-mapped, the DMAC can write to pretty much any peripheral - SPI, UART, GPIO, timer, etc.

I suppose you could transfer to the external memory space, and use one of the built-in chip selects and a latch to both store the data and strobe the external peripheral.

Reply to
DJ Delorie

The act of writing to the external peripheral is how it "knows" the data is there. IOW, the -wr strobe and the address lines tell it.

Its DMAC engine can be

That sounds good as long as we're not talking about incurring interrupt overhead on a byte-by-byte basis.

Um, the peripheral I need to interface to is *external* to the uP, not the SPI etc.

Yes, exactly, that's the point - using the external memory bus. I'll take a look at the M32C family. Thanks, Bob

Reply to
Bob

Freescales MPC5200B can do that (not the old 5200, it did not have plain external DMA requestor pins). It has a very nice, pretty sophisticated (and not quite documented...) SDMA (Smart DMA, called Bestcomm in the datasheet), which I recently had to understand and make use of. It took me a while to figure it all out, but it was worth it. Note that your peripheral will not get a DMACK signal, i.e. it will not know whether it is the DMA which does the access or the core based on the bus cycle alone.

Dimiter

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Reply to
didi

On Coldfires, you configure the "DMA Timer" component to let the DREQ signal pass through. We have the 5282 performing DMA between an external device and memory this way, and it should also work device to device.

Reply to
katmac

Ahhh, I see (said the blind man). Configure the timer to count an external pin; no prescale; count to 1 (or 0?); Configure DMA to transfer

1 byte per trigger; use the timer as the DMA trigger. A little convoluted, but if it works then I'm happy. Thanks, Bob
Reply to
Bob

Not that convoluted. You set the DMA timer input pin to cause a "capture event", and then set the capture event to cause a DMA request. The DMA request can cause a transfer of 1 byte or multiple bytes. The internal DMA ack automatically updates everything for the next request.

We don't really care what timer value is captured, although I think the timer must be enabled. You can read/reset the 32-bit timer counter for un-related software timing functions, such as a microsecond counter.

Reply to
katmac

Some Renesas chips have external DMA request/acknowledge lines, such as the H8S2633.

Reply to
Hans Odeberg

Yes, the h8S and H8SX use External DMA channels to direct-drive TFT LCD panels. EXDMA allows and external peripheral to request the transfer from external RAM without halting the internal CPU core.

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Reply to
vinnie

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