unified ISA

Just wondering what people think of Fred Weber of AMD's proposal to introduce the x86 as a unified instruction set architecture for use in emdedded systems? Thanks Lynn

Reply to
Lynn Travers SE2001
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I'm sure *he* would like that :-P

-- Michael N. Moran (h) 770 516 7918

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Reply to
Michael N. Moran

Talk about a proud step back to the Dark Ages.

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-- Lewin A.R.W. Edwards

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Reply to
Lewin A.R.W. Edwards

There are at least some decent and proven tools available for a moderate price. Actually still light years ahead of the average embedded crowd.

Rene

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Reply to
Rene Tschaggelar

Got a link? I'll read it and get back.

Reply to
Jim Stewart

I believe that there is a company out there that is makes a synthesizable x86 compatible core...

Reply to
Jon Beniston

I don't know that I would be so quick to characterize x86 tools "decent and proven". Rather, they are just *old*. Not in the sense of wine, but more in the sense of cheese.

Anyway, the architecture is horrible due to backwards-compatibility cruft. $/W/MIPS, RISC solutions are better for embedded apps.

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-- Lewin A.R.W. Edwards

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Reply to
Lewin A.R.W. Edwards

Never heard of the proposal. The guy's talking through the wrong orifice.

Too many bytes per instruction to fit much of a program into 1k. Very difficult to see how you could "harvardize" the hardware architecture for those systems that need maximum speed. In it's current implementations too many cycles per instruction to get reasonable speed at low clock rates (for EMC). Too many instructions, increasing the amount of decode silicon required. Makes it more difficult to get sub 50c processors. Other than that, if you're not concerned about power and want a large, medium speed processor that's difficult to program buts has lots of tool support - and I've used x86's when I wanted just that - there's nothing wrong with the instruction set that you can't hide behind a good compiler.

It's a bit like saying "let's make the SUV our unified vehicle architecture". It oversimplifies, and misses the fact that one project's requirements are different from another's. That's why there a sports cars, Hyundai Accents, pickup trucks, 18 wheelers, buses and psychedelic Kombi vans.

Still, it must sound good to the board and the more naive shareholders. I'm sure glad that I don't have too shares in a company where major decision makers are so far removed from the real world. I worked for one once, but that's another story.

Cheers,

-- Alf Katz snipped-for-privacy@remove.the.obvious.ieee.org

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Reply to
Unbeliever

You mean including the old 8087 FP stack instructions, the MMX instructions, the SSE2 floating point instructions? How about the TASK instructions, call gates, and the rest of their "silicon operating system" phase. Would this include the decimal adjust instructions? And what of the 64-bit extensions.

I don't think you'll see that at 99 cents per unit yet.

I suppose you could reduce it to a reasonable subset. And then it would be incompatible with standard x86 processors. And what would be the point of that?

My suspicion is that the only people we care that much about an instruction set are the ones who don't have HLL source.

--
	mac the naïf
Reply to
Alex Colvin

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Reply to
Gemma Jane Howie CS2001

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oved_MPF_03_Keynote.pdf

Is there anything readable to back up the power point garbage?

Reply to
Richard Henry

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Maybe I'm missing something, but all I saw was a slideshow touting AMD's broad x86 line. There's no industry proposal that I could see.

I happen to like x86 for embedded, but I have a problem with AMD blowing away their 186 line then saying they have a comprehensive x86 line. 186 stuff is still a good mid- range fit for many applications.

jim

Reply to
Jim Stewart

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