I have tried to figure out from TMS470R1 documentation but it is not clear to me if what I want to do is possible. I want to access two classes of devices through the external bus: an asynchronous memory and slow peripheral devices (from a legacy design). The async memory will be 16 bits wide and should be accessed as fast as possible (timebase: SYSCLOCK @ 60MHz) whereas the peripheral bus will be 8 bits wide and will have slower access (timebase: CLKOUT @30MHz).
1- Is it possible to do what I want? That is, to access two classess of devices with different clock rates and bus widths through the external bus?2- Assuming yes to the above, what registers should I configure? What are the relevant bits do to what I want? Or at least, where should I look at in the documentation?
Thank you very much in advance for your inputs.
Elder.