Timer (capture/compare) issue

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I'm looking for any good advice on working with the capture/compare unit of
the eZ8.
(eZ8 documentation references below)

The goal is to capture the time between two events (high signals). It must
reliability capture these events continuesly with the highest possible
To complicate the matter, the times scale beyond the 16-bit counter.
Multiple interrupts are generated and while these are running they cannot be
interrupted. This interrupt has the highest priority though.

The timer has a 16-bit up-counter, 16-bit reload register and 16-bit
PWM/Compare register.
It has a input pin and an output pin. The input pin is used for capturing
the event.

The global design is:
- Interrupt (high-priority) driven capture stores value in a queue.
- Non-interrupt loop processes the queue (can process hold-off, corrections,
   it writes the data to an output queue
- Interrupt (low-priority) driven transfer from output queue

My idea was to use the "capture/compare" mode.
The timer starts on the first external Timer Input transition.

Every Timer Input transition:
- writes the value to the PWM register
- Interrupt is generated
- counter resets to 0x0001 and continues.
Upon overflow (compare value of 0x0000):
- Interrupt is generated
- counter resets to 0x0001 and continues.

The timer output is toggled on every counter reset (so with every overflow
and input transition).

I can guarentee:
- Interrupt can be handled between overflows with ease.
- Another 16-bit counter is continuesly counting at the same speed.

I cannot guarentee:
- The interrupt is for an overflow AND external event.

I'm looking for a way to guarentee:
- Not miss any event.
- Proper seperation of events (analog filter).
Can anyone help me with this?

- Joris


eZ8 site: http://www.zilog.com/products/partdetails.asp?id=Z8F6403

eZ8 Product Specification: http://www.zilog.com/docs/z8encore/ps0176.pdf
Sections involved:
- "Timers" on page 57 (absolute page 75)
- "Interrupt controller" on page 44 (absolute page 62)

Re: Timer (capture/compare) issue
Quoted text here. Click to load it

The following is general advice based on your description, not
familiarity with the particular processor.

Quoted text here. Click to load it

How do you intend to modify the input signals to ensure proper
separation?  Will you filter possible glitches or implement a holdoff?
Implement hysteresis on an analog comparitor?

Assuming that the repetition rate is limited to an interval you can
handle, you want to make sure that you handle a rollover followed by an
input change before you can service the rollover. I assume that there is
an indication that the input transition has occurred.  Since the timer
output is toggled with each reset, and you would have two resets in that
scenario (if I understand the operation), the double toggle would be an
indication of rollover followed by input change.  The opposite
situation, input change followed by rollover shouldn't be an issue since
the input resets the timer, assuming that you can service the input
change within a timer cycle.  Another possible indication of the double
interrupt condition would be the elapsed time indicated by the
independent timer, although that would be trickier to insure that you
have taken its possible rollover into account.


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