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Testing ARM/FPGA with IAR EWARM and ModelSim (with Tcl Interface)

I hope to get your feedback of what you think of integrating IAR EWARM (probably the same for EWAVR) with the hardware development scene.

All our hardware design tools have Tcl scripting support for batching. I think it would be great to have the IAR simulator communicate with our FPGA simulator ( in our case ModelSim ) . This way we can make nightly builds possible and make tests with the ARM and the FPGA, resulting in better quality and early detection of faults.

The easiest way to integrate with multiple other environments is to make a macro available in the debugger to execute an TclScript. To make it more useful i would like to set an memory range (address of the FPGA) like for example 0x40000000-0x60000000 and all memory access in this range should be handled with the Tcl script. This tcl script returns an value on read. or just voids on a write.

Please let me know what you think, to work on the idea so we can make a sollid feature request @ IAR.

Best regards,

Allard

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Allard
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"Allard" skrev i meddelandet news:490f58e6$0$12073$ snipped-for-privacy@reader.xsnews.nl...

Don't know what can be accomplished, but I think that the best would be if the debugger can open a network connection to an ARM simulator implemented in PLI in Modelsim. The simulator would generate bus cycles.

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Best Regards,
Ulf Samuelsson
ulf@a-t-m-e-l.com
This message is intended to be my own personal view and it
may or may not be shared by my employer Atmel Nordic AB
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Ulf Samuelsson

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