Hi,
I don' t understand why two SRAM of 64k Words in my case have not got the same address pins order, although it is not important in my case. There is not a standard?
Thanks.
- posted
19 years ago
Sram pins normalized?
Loading thread data ...
- Vote on answer
- posted
19 years ago
"pes" schreef in bericht news:ct5k2i$p6n$ snipped-for-privacy@news.tiscali.fr...
Doesn't make any difference. Rename them if you like. The microprocessor does not care if data get's stored at a 'wrong' address. When it retrieves the data, it will fetch it from the same 'wrong' location.
-- Thanks, Frank. (remove 'q' and 'invalid' when replying by email)
- Vote on answer
- posted
19 years ago
There are JEDEC(?) standard pinouts for memories, but maybe these two chips you're talking about are different parts. For instance maybe one supports x8 as well as x16 operation.
- Vote on answer
- posted
19 years ago
Frank Bemelman a écrit :
indeed, you' re right, and it' s conform to the jedec standart. I' ve just found the reason of the differences in this paper
formatting link
thanks
- Vote on answer
- posted
19 years ago
What the others said is correct. You can use any address line for any address, (and any data line for any data), BUT if you ever hope to plug a flash or eprom chip in the socket, be ready for a nice sillywalk to get your program or data to come out linearly (: