Spikes in digital logic outputs on startup?

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Hi,

Has anyone any experience on the dynamic startup behavior of digital logic
circuitry on power-up? I'm trying to determine if digital logic (NAND, NOR,
FF) has a spike on startup which could trigger a connected transistor.

Thanks in advance!



Re: Spikes in digital logic outputs on startup?
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Lacking any schematics, power on waveforms, definition of
"trigger", etc. my crystal ball says "possibly".

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Re: Spikes in digital logic outputs on startup?

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NOR,
YES,
one cause:
Look at your ground plane as a resitor divider network,then inductances as
well for any kind of transients (as in power on)
another cause
Do your logic network startup at the power defaults of the chips or du you
"force" a different state. (an inverter that has to go high will need some
time to do so)

HTH

--
----
Morten
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Re: Spikes in digital logic outputs on startup?
says...
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I've also found that latches and flip-flops from different manufacturers
may power up in different output states.  Case in point:  74LCX574s from
Fairchild power up with the outputs high. TC74LCX574s from Toshiba power
up with the outputs low.   That makes it important that you set the
desired value before you enable the outputs.  (I learned the hard
way, of course!)

Mark Borgerson



Re: Spikes in digital logic outputs on startup?
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A potentially BAD experience, which I wish I had videotaped. I was
designing the ignition sequencer for a model rocket to be launched
underwater, and I found out the hard way that *anything* can happen
when power is applied. At that moment, all sorts of timing limits are
potentially being violated.

If you have an application like mine, where unexpected momentary
switch-on is never, ever acceptable, then please pay careful attention
to power and reset sequencing. This may add a lot of complexity
depending on your design... (In my case, it was a potential
show-stopper - I had to fit my circuit on one side of a 20mm circular
PCB). I used a Maxim power watchdog IC - don't have the part# handy
but I can look it up - and a second switching transistor to keep the
igniter isolated until the rails were stable. You might get away with
using a tristate buffer between your logic and the circuit being
driven. Have appropriate pullup/pulldown on the buffer outputs to keep
them at a safe state when hi-Z, and use a power watchdog IC to keep
those outputs tristated until the power is known good.

Re: Spikes in digital logic outputs on startup?

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Yeah, all kinds of bad things can and do happen as the power goes up
(and DOWN, don't forget that). Often simple-Simon RC/diode circuits
can control things, most of the time, on power-up, but not ALL the
time, and not on power-down. Be afraid.

Supervisor chips are an easy way to control this kind of behavior, but
some analog knowledge may still be required, because they don't
guarantee operation right down to 0V. Hence, you have to guarantee
that your circuit *won't* work below a certain voltage under all
possible conditions. For example, the supervisor chip may be
guaranteed to have a valid output for Vdd >= 1.0V, but your transistor
may possibly turn on at 0.75V. Between 0.75V adn 1.0V, the behavior is
undefined. Most units will probably work okay, but some may not, under
some conditions (maybe high ambient temperature, high-beta
transistors, or during a full moon).

Best regards,
Spehro Pefhany
--
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Re: Spikes in digital logic outputs on startup?
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If its just one output line a gate is often the simplest option: just
one tr, R and C. It allows conduction after the RC has reached enough
V for tr to conduct. For digital lines where you cant afford the
Vdrops of a bjt, use a fet.


Regards, NT

Re: Spikes in digital logic outputs on startup?
On 6 Feb 2004 01:01:10 -0800, the renowned snipped-for-privacy@meeow.co.uk (N.

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See above.


What happens when the power goes off (when the digital stuff is not
guaranteed to work properly, but bad things are not guaranteed NOT to
happen)? What if it goes up to just okay, then dips off again? A
simple RC (or RC + diode to Vdd) is not foolproof. It's cheap and it
works *most* of the time, but it's not the correct thing to use in
protecting memory or other hardware that might do the wrong thing. It
needs to be sensitive to absolute voltage, with some degree of
accuracy, and preferably to have a fixed time delay.

Example where RC is okay: reset line for a calculator chip with
no persistent memory

Example where RC is not okay: garage door opener, instrument with
nonvolatile calibration memory or user settings, etc.  

Best regards,
Spehro Pefhany
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Re: Spikes in digital logic outputs on startup?
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Completely agree - a very common design error IME.

One exception, however, is the rare case of a situation where the PSU has
its own brownout logic, and guarantees a minimum powerdown hold time and
rise/fall times. (I queried a design with an RC on the reset once, fully
confident that it was a classic mistake - but it was, to my surprise,
justified on the above grounds.)

Steve
http://www.fivetrees.com
http://www.sfdesign.co.uk



Re: Spikes in digital logic outputs on startup?
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I'm not suggesting an RC, but R-C-Fet. The FET stays oc until its RC
has charged, which is set to well after the rails are up.

Regards, NT

Re: Spikes in digital logic outputs on startup?

[snip]
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I've used a TL430 as an under-voltage sensor plus an LM339 with an R/C
to thwart an ass-hole who figured out how to blow my switching power
supply design by rocking the switch ;-)

                                        ...Jim Thompson
--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
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Re: Spikes in digital logic outputs on startup?
On 6 Feb 2004 12:35:29 -0800, the renowned snipped-for-privacy@meeow.co.uk (N.

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And what happens if the power blips back down out of spec after the
FET has turned on?

Best regards,
Spehro Pefhany
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Re: Spikes in digital logic outputs on startup?
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I'd add a diode from the cap to the + rail. When power sags C
discharges into the rail.

Regards, NT

Re: Spikes in digital logic outputs on startup?
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Slightly better, but not much. This has all kinds of pathologies (think
forward drop, inductance etc). RC reset circuits, even with the diode,
should be in the "How not to do things" sections of Horowitz and Hill (and
possibly are...).

Steve
http://www.fivetrees.com
http://www.sfdesign.co.uk



Re: Spikes in digital logic outputs on startup?
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Maybe for the naked diode, but add a series R and you are
controlling rise and fall times separately.  The local supply
capacitors should prevent any short supply transients anyhow, and
if they do appear all is already lost.  This is probably a
situation where the entire local supply should be diode isolated
anyhow.

Vcc ------+-------->|-------------+----------> circuit
          |                       |
          |                       = C
          |                       |
          |                      gnd
          |                      
          +------R2-----+----> reset control                      
          |             |
          |             |
          |             |
          +--R---|<-----+---C2--- gnd

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Re: Spikes in digital logic outputs on startup?
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For the second time, I was not suggesting an RC to a reset pin. Read the thread.


Regards, NT

Re: Spikes in digital logic outputs on startup?
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thread.

I have, and it makes no difference. It's still lame.

Steve
http://www.fivetrees.com
http://www.sfdesign.co.uk



Re: Spikes in digital logic outputs on startup?
On 7 Feb 2004 03:56:01 -0800, the renowned snipped-for-privacy@meeow.co.uk (N.

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So the capacitor is Vdd + 0.6V as the supply rail drops. At what Vdd
voltage will the FET turn completely off (to the extent that it can't
possibly cause any problems under all conditions and with any FET of
the part number you have in mind)? Suppose there's some SOB rocking
the power switch back and forth and the supply voltage is going in and
out of spec (by which I mean the voltage at which the digital stuff is
guaranteed to be working properly).

Another possible pathological situation- suppose the supply voltage is
coming from the AC line via a variac and I increase it very, very
slowly- much more slowly than the RC time constant. Will it still
guarantee everything is in the proper state?

Best regards,
Spehro Pefhany
--
"it's the network..."                          "The Journey is the reward"
snipped-for-privacy@interlog.com             Info for manufacturers: http://www.trexon.com
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Re: Spikes in digital logic outputs on startup?
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Indeed, one needs to know what V is fully off for the fet, and down to
what V the logic will work correctly.


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Sitting here thinking about it I'm realising that in the other
scenario the fet gate could reach +0.6v relative to its other
electrodes, as the V on those other trodes will drop during supply
rail drop. Depends on your chip outputs though, chips that have
V_out_max thats well below the + rail wont get the fet into that
situation.

The power rail has a reservoir cap which limits the rate at which its
V drops, so that the fet's diode has a controlled discharge rate into
the power rail: thus there is no issue with diode speed, or lack of.
If the power rail V drops a lot faster than that then there is a
substantial fault, and things have already become uncontrolled.

On another tack, I guess your basic old RC on a reset pin is good in
that it much reduces the frequency of misbehaviour, but bad if you're
relying on it to work every time. So that's not so much bad circuitry,
as circuitry that doesnt do what its popularly expected to do, ie
often misused circuitry. In military tronics, yes, bad, but in
consumer tronics not necessarily.


Regards, NT

Re: Spikes in digital logic outputs on startup?
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If its just one output line a gate is often the simplest option: just
one tr, R and C. It allows conduction after the RC has reached enough
V for tr to conduct. For digital lines where you cant afford the
Vdrops of a bjt, use a fet.


Regards, NT

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