Dear All,
I guess a lot of you are using the AVR range of devices, so hope the answer to my question below will seem straightforward.
The hardware engineers on my team wish to use the ATmega64 in a design we're working on. I'm the software engineer. The design relies on having 2 UARTs and and an SPI bus available simultaneously. On paper, this processor seems to provide this. However, I'm concerned that some of these functions may be multiplexed, i.e. can only have 2 UARTs and no SPI, or 1 UART and SPI present.
The data sheets are a little vague on this. Can anyone shed some light on this?
Very many thanks in anticipation!
Kind regards,
Clive Wilson