When it is not a branch or mov pc instruction in address 0x0, I always get the error "ARMv6 ReadWords starting 0xffff_fffc reading 30 words. from target : ARM1176JZF-S_0". The platform I use is a standalone embedded system with jtag debug link to host. However, strangely I can run any code in modelsim from address 0x0. Was it like a memory acess problem, i.e., not a problem in the processor itself?
The 'normal address' of the vector table is 0x00000000 (specifically reset vector at address 0), so I'm not sure what else you would want to put there other than an address that jumps to your reset handler.
-- Regards, Richard. + http://www.FreeRTOS.org 13 official architecture ports, 1000 downloads per week. + http://www.SafeRTOS.com Certified by TÜV as meeting the requirements for safety related systems.
Sorry, but I think Richards answer is slightly misleading. The vector table should only contain branch instructions. It is not simply addresses of a function to execute, but a real branch instruction e.g., ( b your_handler_address ). Some implementations use an advanced interrupt controller that helps dispatch through a vector table in the AIC. The instruction at the IRQ or FIQ vector is still a branch instruction, but in the case of AIC it is a relative branch from an address stored within the AIC.
You should not put other code in the vector tables. The 1176jzf-s0 also include both secure and non-secure vector tables. To the best of my knowlege they function exactly the same as the normal ARM vector tables.
-- Scott Validated Software Corp.
Yes - that should have read "so I'm not sure what else you would want to put there other than an *instruction* that jumps to your reset handler." Finger trouble.
-- Regards, Richard. + http://www.FreeRTOS.org 13 official architecture ports, 1000 downloads per week. + http://www.SafeRTOS.com Certified by TÜV as meeting the requirements for safety related systems.
put
I agree that address 0 is usually or always (or should be) loaded with a branch inst (when reset it jumps to the reset handler), but here is my case: for simplicity and test purposes, I downloaded my linux bootloader and kernel to address 0x0 and 0x20000 in flash, when reset pc goes to addr 0 which is the first inst in bootloader, and this instruction may not be a branch inst (and I got the above error in this situation), also, when the memory is remapped and the kernel in flash is copied to dram and then the dram is remapped to address 0, this may still not be a branch inst in address 0.
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