Serial port throughput

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OK, will try it. If that's the case, Microchip is putting out wrong demo code for every serial appt for PIC18,24 and 32.

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Checking TRMT bypass the transmitter buffer.

Checking UTXBF should be correct. However, it garbles the first few characters upon reset.

Will try two sets of routines and see if it works.

Oh well, so much for that idea. :-)

There are two questionable areas about the above code which I see. Once again, I have not used this architecture and I am going purely by what is written in the PIC24F familiy reference manual.

1) You write U1BRG before writing BRGH. Given that writing U1BRG has immediate effects, is this a problem ? 2) The BAUDRATEREG2 calculation has a baudrate related term for the clock speed which does not appear in the reference manual. However, when you do the calculation manually, it's does not appear to be a large enough value (when using bc) to make a difference in the final result.

BTW, are you turning off the transmitter between characters before turning it back on to transmit the next character ? I've been caught by a MCU which can lose characters when you do that (if the previous character is still been transmitted).

Simon.

--
Simon Clubley, clubley@remove_me.eisner.decus.org-Earth.UFP
Microsoft: Bringing you 1980s technology to a 21st century world

Should not be a problem. We are not doing I/O yet.

GetSystemClock() is just a macro returning 32000000. PIC24 needs 2 clock cycle per instruction.

No, I am not touching the UART registers outside init, get and put.

Still need a 25usec delay after transmitting.

// check UTXBF until it is zero. while(U1STAbits.UTXBF !=3D 0); U1TXREG =3D ch; for(i=3D0; i

I was thinking of this comment in section 21.3 of the PIC24F Family Reference Manual when I wrote that:

|Writing a new value to the UxBRG register causes the BRG timer to be reset |(cleared). This ensures the BRG does not wait for a timer overflow before |generating the new baud rate.

Writing the U1BRG register is the trigger for resetting the timer. However, when you do this, BRGH is still 0 so the value will be misinterpreted.

What the reference manual does not say is what happens when these fields are written while the UART is disabled.

I noticed in another message you said you were getting junk for the first few characters. I wonder if this is why.

I was thinking the extra term after GetSystemClock(), but having had another look, I realise it's to make the calculation round instead of truncate.

Ok, that is strange. I assume all the relevant variables are declared as volatile ?

Apart from that, since I have not actually used this architecture, I have no more ideas.

Simon.

--
Simon Clubley, clubley@remove_me.eisner.decus.org-Earth.UFP
Microsoft: Bringing you 1980s technology to a 21st century world

It would be interesting to see what code the compiler is actually generating for

while(U1STAbits.UTXBF != 0);

How does it translate the element of the status bits structure?

Mark Borgerson

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Microchip assembler codes are very difficult to read, but here it is:

.def _UART1PutChar .val _UART1PutChar .scl 2 .type 041 .endef .global _UART1PutChar ; export _UART1PutChar: .def .bf .val . .scl 101 .line 290 .endef .def _ch .val 1 .scl 17 .type 02 .endef .def .bb .val . .scl 100 .line 290 .endef .set ___PA___,1 mov.b w0,w1 .def ___FP .val 15 .scl 4 .type 4 .endef .L38: .ln 294 mov.b _U1STAbits+1,WREG btst w0,#1 .set ___BP___,89 bra nz,.L38 .ln 295 se w1,w0 mov w0,_U1TXREG mov #400,w0 .L40: .ln 297 nop dec w0,w0 .ln 296 .set ___BP___,99 bra nz,.L40 .ln 299 return .set ___PA___,0 .def .eb .val . .scl 100 .line 299 .endef .def .ef .val . .scl 101 .line 299 .endef .def _UART1PutChar .val . .scl -1 .endef

So this would be it, then?

Mel.

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To which pins did you map the UART? And did you lock the IO mapping afterwards?

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To which pins do you have the UART mapped? Did you lock the IO after mapping?

If you get rid of all the junk put in there by the compiler for its own housekeeping, the actual assembly isn't all that difficult to understand. I'm not entirely clear on the relationship between WREG and w0 in the two lines after .L38: That is due to my ignorance of the architecture of this particular PIC chip. On other chips, I would guess that the code is loading into one register, then checking another. But then it is possible that one of those deleted directives is telling us that WREG is really wO.

It looks like the character to be sent arrives in w0

The remaining questions are:

is bit #1 of the register at _U1STAbits+1 the proper bit to be testing? You should verify this with the data sheet.

Is that bit 1 when there is still data being transmitted?

It doesn't look like the register loads are being skipped--- something that you can see if the registers aren't defined properly as volatile.

Mark Borgerson

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RP26 for RX and RP10 for TX.

Bit 9 of U1StA or bit 1 of U1STA+1. It is the transmitter buffer empty flag when 0.

Just got some TI max232. Running without delay now.

while(U1STAbits.UTXBF !=3D 0); U1TXREG =3D ch;

I have to conclude that TI max3232 does not meet the spec.

Thank everyone for responding to this issue.