Regarding cold boot and SDRAM status

Dear all, Recently happened to investigate an exception issue due to raising of exceptions from ISRs. I am using ARM based custom processor with vxworks 5.5.I have the following doubt:

The vxworks manual states that when ever an exception happens from ISR the system will get rebooted and it will print the reason behind exception on system console. My doubt is where exactly in physical memory is this exception related info stored?One of my colleague says it stores in SDRAM and which is configured in config.h of the BSP. I am not convinced by the reply,because when ever system reboots is it not that the SDRAM contents get cleared?My colleague argues that during

cold boot SDRAM contents are not cleared.

I wanted to confirm what he says is correct?How does the processor/OS ensure RAM contents not to be cleared incase my colleague is correct? What exactly is the difference wrt to memory contents when doing a cold

boot and warm boot?I understand cold boot will not have any memory contents other then in ROM.But I want to know RAM related stuff.I would

also like to know role of NVRAM here.I read that in nvram there will be

a cookie variable stored to decide whether its warm or cold boot.Is this understanding correct?

Advanced thanks for all your replys and looking farward for the same, Regards, s.subbarayan P.S:I posted this query in vxworks group also but since topic is generic in any processor /OS I am posting it here to attract more replys.Sorry incase this is wrong place to discuss.

On 21 Aug 2006 08:12:28 -0700, "ssubbarayan" wrote in comp.arch.embedded:

The topic is not really generic to any OS, because many embedded systems do not have any OS.

How they do it on your particular system is probably specific to your OS and BSP, as they both must have some agreement on how this is done programmed into them. There is some method to tell the boot code/BSP that this is a warm boot, and perhaps the cause of the warm boot, so it can look for the additional data someplace before it gets erased.

How I have done it in different systems included a value in static RAM, a value in EEPROM, and even a value stored in the scratchpad registers of 6 different 16C550 compatible UARTs on the board. After making sure that the data sheet for this particular UART said that the scratchpad register contents were unchanged by a reset. That gave me essentially a 48-bit value, so the odds are very great against it showing up by itself at power up.

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