Try the 8048 in assembler - IIRC the program counter wrapped around at
256 byte page boundaries. Or something. So you had to manually shuffle all the subroutines around, with some judicious NOPS to space things how you wanted them.-- John Devereux
Probably just as bad as the RCA CDP1802. IIRC, no stack and no subroutine call instruction.
Mark Borgerson
No, but I can see how a BGA is moving when I weld it. That is enought for a prototype. And it is possible to view the solderballs at the outer side of the BGA.
Olaf
There is no good reason NOT to call it a linked list. In every important semantic way it is a linked list. It's just an implementation detail how that is handled. I would intentionally NOT give it a different name, unless it were important in communcating the distinct nature of the implementation to an audience. Then I'd probably add an adjective to it to clarify.
There is a need for saving ram, in ram-starved systems. Every byte counts then. I use a #if to modify code so that it works either way. I use a #define to indicate which type of list is used. The semantics are identical, either way. But more code space (and time) is required when using singly-linked lists. But if the ram limitations are perverse (as they are in 128 and 256 byte ram chips, for example), then the price is worth it. The O/S is designed to operate either way. It's a compile time option which way it goes.
Traversing the lists in both directions isn't needed in the O/S. It helps, of course. But it's not necessary. Inserting a process at the end, for example, would require walking the entire list in a singly-linked system, without ad-hoc mods to address that detail. That's time. But that's not impossible.
Jon
The vendor that I use for board fab doesn't support microvias on double- sided boards -- I think they don't want to try drilling teeny holes in such thick material.
I am still curious about how one would get the signal out.
-- My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.com
No problem :) The subroutine just has to know all return locations. As there are not many states in the program, most of it could be hardcoded. It is going to be very safe and reliable. BTW, I had to write programs for i8080A without any RAM at all.
Vladimir Vassilevsky DSP and Mixed Signal Designs
That's not *bad*, it just more or less forces you to use state machines and keep exhaustive comments.
-- Les Cargill
The CDP1802 had all the bits and pieces to implement a stack and both call and return functions -- it just didn't give it to you in one spot (kinda like a RISC machine, except that the CDP1802 never had an instruction set).
The manual included recommended assembly macros for call and return. IIRC you ended up using one GP register for a stack pointer, one for the regular program counter, and one for the program counter during the call and return.
-- My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.com
Op Wed, 27 Feb 2013 19:10:34 +0100 schreef Jon Kirwan :
My apologies, I misread "your method" to be distinct from true linked lists by having a separate array of indices that describes the element order. In hindsight I don't know how I could have misread it as it is described clear as can be...
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On Thu, 28 Feb 2013 10:27:22 +0100, "Boudewijn Dijkstra" wrote:
Just to be clear, one possible incarnation would look like this:
qn qp qk Description ---- ---- ---- ---------------------------- | | | | | p[0] : | | | | | p[1] : | | | | | p[2] : ~ ~ ~ ~ ~ p[...] processes ~ ~ ~ ~ ~ p[...] : | | | | | p[PLIMIT-2] : | | | | | p[PLIMIT-1] : .... .... .... ---------------------------- | | | | | ready tail : | | | | na | ready head : .... .... .... -------------------- : | | | | | sleep tail : | | | ---- sleep head : .... .... -------------------- : | | | s[0] tail : | | | s[0] head : | | | s[1] tail queues | | | s[1] head : | | | s[2] tail : | | | s[2] head : ~ ~ ~ s[...] : ~ ~ ~ s[...] : | | | s[SLIMIT-2] tail : | | | s[SLIMIT-2] head : | | | s[SLIMIT-1] tail : | | | s[SLIMIT-1] head : ---- ---- ----------------------------
Where qn[] is a byte array of next indices, qp[] is a byte array of prev indices, qk is a key used for priorities or for the sleep queue delta time values (union.) (The semaphore queues don't require this.)
Jon
Freescale just presented a very small ARM:
Bye Jack
-- Yoda of Borg am I! Assimilated shall you be! Futile resistance is, hmm?
I don't know exactly what constitutes a micro-via, but yes, the smaller BGAs require fine pitch routing and often very tiny via pads and holes. That is the main reason I avoid them. I want to avoid the premiums for the fine pitch board fab.
-- Rick
Bumping this thread with an update...
Still waiting on N76E884, tho there is a PDF brief since Sept 13.
Meanwhile, Silabs have just released their new EFM8 series.
Not the Wide Vcc of SyncMOS, but easier to get & develop with.
The url actually gets you somewhere a bit closer (your, presumably hand tyoped one has the slash the wrong way round and doesn't get you the chip you mentioned).
I note that this seem to be an 8051 derivative (8-bit).
The TSSOP20 package is not much more real estate and you get chips with an ARM Core M0 with 12-bit ADC's, a processor clocked at 48MHz, with UART, I2C, SPI and a whole host of other goodies.
I shall be trawling the TI site to see if they have a FRAM based device in that package size with 12-bit ADC.
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oops, however paste of my typo does land here fine
To put a via inside a 0.5mm grid, you would need around 0.2mm hole and 0.1mm ring. Oh yes, you can consider it micro-via.
It's not what they think you want, it is what people are willing to pay for in quantities that turn a profit. There are physical limitations to how small a device can be if you include more memory. As somone pointed out the smaller processors are pretty tiny, but that doesn't include the RAM, ROM, peripherals or even the I/O pads.
Ok, so?
We have had this conversation before. You really need to forget the idea of hand placing and soldering these sort of devices. You can build a prototype with a larger package and then move to the rice grain packages for production if you insist on hand building prototypes.
-- Rick
How do you apply the solder?
I have not met anyone who deals with these very tiny BGA or LGA packages in a home lab. I'd like to meet someone who claims to do that.
-- Rick
All from 10 seconds with google (bga soldering at home), 60 seconds copying URLs
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