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This is not a 'binary' newsgroup, so your schematic didn't survive -- usually one posts it to a website; there is a binaries.schematic newsgroup to go with sci.electronics.design.
Power FETs usually require a considerable gate charge, with apparent capacitances above 1nF. To a port on a microprocessor this would look like a dead short at first, and would suck considerable current for a relatively long time. I would put a series resistor from port to gate, with the resistor sized so that the 'short circuit' current was no more than the rated current for the port. This will slow down your gate turn-on a bit, so make sure you're OK with that (if it's a one-time event then it probably _is_ OK). If you're _not_ OK with that then consider a transistor amplifier to pull the gate high -- an inverting PNP would pull the FET gate up smartly enough.
-- Tim Wescott Wescott Design Services
Hi,
for the schematic please refer to:
Olaf
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Maybe you have some kind of serious layout problem. There's only about
2A going through the FET, but if it the path is really, really bad, it could end up biasing some pins negative or something like that.Give the 1 ohm resistors and Q7 their own path back to the high-current supply, and only tie that to the AVR supply at one point.
Best regards, Spehro Pefhany
-- "it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com
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