Port 0 on 8052 (DS89C420)

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Hi,
  I am implementing a circuit which utilises a single port as a
bi-directional data bus (writes data to #3 74ls373s and reads data
from #2 Max6818 which have tri-stated outputs)
My question is as to which port would be a better choice: Port 0 or
Port 1? I have both ports free. Additionally I have read (src:K.J.
Ayala) that the port 0 requires external pull-ups. So will port 0 then
require additional resistors for acting in the way as required above?
 Thanks
Abhijit
INDIA

Re: Port 0 on 8052 (DS89C420)
snipped-for-privacy@eth.net (Abe) wrote in

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Since Port 0 *is* the 8051's addresss/data (mux'd) bus I'd say you ought
to use that one. Keep in mind that the 8051 architecture uses P2 and P0 to
emit the 16-bit external data / code address, then asserts ALE so that
your hardware can latch the P0 (LSB) portion of the address, and then
finally the data is read or written on P0.

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Re: Port 0 on 8052 (DS89C420)
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It all depends on how you read and write to the latches and MAX6818. If you
hooked them up as real memory mapped devices and use the RD, WR and ALE
signal, you use P0 since this IS the external databus and low byte of the
address bus. In bus mode, P0 does not need pull-ups. If you treat P0 as a
standard I/O port and you read/write your chips by explicitly outputting
signals to P0, you need pull-ups. If you want to save on them, use P1.

Meindert



Re: Port 0 on 8052 (DS89C420)
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For selecting the latches, I am using the P2.x lines. I.e to enable
latch 1, I send a 1 to P2.1 which is connected to the LE of the
sn74ls373. Then to enable other latches, 1 is sent to the
corresponding P2.x, while all others are 0( except that the MAX6818s
get 1 on their /E/N pin). Now is it necessary to give pull-up
resistors for P0 acting as the databus. This is confusing me since all
the RAM/ROM interface schematics I have seen, don't seem to use
pull-ups.
Thanks again
Abhijit

Re: Port 0 on 8052 (DS89C420)
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Read the description of the Port 0 pins from the datasheet.  It should state
something like this (from an Intel 8051 manual):

"Port 0 is also the multiplexed low address and data bus during accesses to
external Program and Data memory. In this application, it uses strong internal
pull-ups when emitting 1's and can source and sink 8 LS TTL inputs."


Re: Port 0 on 8052 (DS89C420)
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In this setup you need pull-ups. You use P0 as a generic port.

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No, because when accessing ROM/RAM, you do not drive P0 explicitly by using
a MOV A,P0 instruction. When accessing RAM, you load the DPTR register with
an address and the data is moved by a MOV A,DPTR instruction. This results
in a memory access cycle when P0 is behaving as a normal databus without the
need of pull-ups. Also, P2,ALE, RD and WR lines play a role in this type of
access. Please read a datasheet of the '51. It is all explained in there.

Meindert



Re: Port 0 on 8052 (DS89C420)
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Thanks, I think I am going to stick to P1 as my databus. As for the
P0, that has to wait until I do my next design based on an 8051.
Abhijit

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