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- PIC PSP port bus contention
November 21, 2005, 7:45 am
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We're trying to interface a PIC micro to an 8052 micro using the
Parallel Slave Port on the PIC. The 8052 can read bytes written to it
by the PIC ok, but when the 8052 writes to the PIC, the PIC tends to
read what it last wrote and not what the 8052 sent. The voltage levels
on the data bus show contention with "half levels" when the PIC and 8052
are opposite states.
Is there something that has to be set differently in the PIC when it's
in "read mode" than when it's in write mode?
Re: PIC PSP port bus contention
We use a "manually" controlled signal that connects to the EXT 0
interrupt pin on the 8052 and the PIC software drives it high then low
to tell the 8052 that a byte is ready or has been read. The data sent
between the two micros is multibyte messages and each message indicates
which micro will transmit next after the current message. One single
lost (or possibly corrupted) character and the link dies - upon which
the 8052 reboots both micros.