Nibz processor @ <570 MAXII LEs (16 bit generic specified), 20MHz

Hi

Some design speed up, and a good fix of that memory bug. The instruction set is at version 2, and it all fits in a MAXIIZ 570, this allows a 1270 design with some custom IO driver logic.

A large part of the gforth port has now been written. This is also a good source for utility machine code routines.

Put a pdf up on the parallelization strategy for the core, and I am open to anyone doing such a kilo cores design.

A single core per ASIC is now offered licence free, so long as the K ring logo appears on the chip (or close by on the PCB), and any documentation produced acknoledges the k ring technologies copyright, and provides the site URL.

Cheers Simon Jackson, BEng. Creative Technologist K Ring Technologies

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Reply to
jacko
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So how much stack can you have withing MAXIIZ 570 for the nibz core ?

Antti

PS how can you limit 1 core per asic if you use BSD license?

Reply to
Antti.Lukats

Hi

I can't if they use the BSD licence.

If they do not want the bsd licence, I can.

Reply to
Jacko

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