newbie: FIFOs and correlation algorithm in C for TI DSPs

Do you have a question? Post it now! No Registration Necessary

Translate This Thread From English to

Threaded View
hi,

im a newbie in DSP and embedded programming and i've some doubts that
i hope some of you could kindly answer.

i've to do some profiling between DSP and ASIC/FPGA solutions. Im a
FPGA guy so im lost with this DSP thing.

1)
i'd like to know what do you think about the code i wrote, cause i
feel it's not very "DSP optimized". I need to implement some sort of
shiftregister or FIFO, because im to calculate a correlation, so
here's how i do it. (like i'd do in vhdl...)

the input coming from an ADC is 10bits wide, so it'll be stored in a
"short"

#include....

#define FifoSize(x) (x+1)

// FIFO declarations
short FifoN[FifoSize(gN)];
short *FifoN_ptr_write = &FifoN[0];
short *FifoN_ptr_read = &FifoN[1];
short *FifoN_end_ptr = &FifoN[gN];

short input;
int multN;

// check for the end of FIFO (write), if yes, then wrap around
if (FifoN_ptr_write == FifoN_end_ptr)
{
     FifoN_ptr_write = &FifoN[0];
}

// write to the FIFO
*(FifoN_ptr_write++) = input;
    
// check for the end of FIFO (read), if yes, then wrap around
if (FifoN_ptr_read == FifoN_end_ptr)
  {
    FifoN_ptr_read = &FifoN[0];
  }

// calculate input * FIFO_output
multN = input * (*FifoN_ptr_read++)

....

EchR = EchR + multN - (*FifoD1_ptr_read++);


is this the best way to do it? or there's a better way to implement
the FIFOs?
should i "fix" for 20bits discarding the first 12? (i guess that's not
necesary)
will memory used by the FIFO be effectivelly stored in the cache?
can i use three operands at the right of the equal? or should i split
the expression?

2)
how about the ADC doing a DMA transfer to RAM and then the DSP reading
a whole chunk of data while the ADC performs the next DMA? it is
possible i guess.

3)
are there online tutorials or coding style guideliness for C for DSP?

Re: newbie: FIFOs and correlation algorithm in C for TI DSPs
hi,

im a newbie in DSP and embedded programming and i've some doubts that
i hope some of you could kindly answer.

i've to do some profiling between DSP and ASIC/FPGA solutions. Im a
FPGA guy so im lost with this DSP thing.

1)
i'd like to know what do you think about the code i wrote, cause i
feel it's not very "DSP optimized". I need to implement some sort of
shiftregister or FIFO, because im to calculate a correlation, so
here's how i do it. (like i'd do in vhdl...)

the input coming from an ADC is 10bits wide, so it'll be stored in a
"short"

#include....

#define FifoSize(x) (x+1)

// FIFO declarations
short FifoN[FifoSize(gN)];
short *FifoN_ptr_write = &FifoN[0];
short *FifoN_ptr_read = &FifoN[1];
short *FifoN_end_ptr = &FifoN[gN];

short input;
int multN;

// check for the end of FIFO (write), if yes, then wrap around
if (FifoN_ptr_write == FifoN_end_ptr)
{
     FifoN_ptr_write = &FifoN[0];
}

// write to the FIFO
*(FifoN_ptr_write++) = input;
    
// check for the end of FIFO (read), if yes, then wrap around
if (FifoN_ptr_read == FifoN_end_ptr)
  {
    FifoN_ptr_read = &FifoN[0];
  }

// calculate input * FIFO_output
multN = input * (*FifoN_ptr_read++)

....

EchR = EchR + multN - (*FifoD1_ptr_read++);


is this the best way to do it? or there's a better way to implement
the FIFOs?
should i "fix" for 20bits discarding the first 12? (i guess that's not
necesary)
will memory used by the FIFO be effectivelly stored in the cache?
can i use three operands at the right of the equal? or should i split
the expression?

2)
how about the ADC doing a DMA transfer to RAM and then the DSP reading
a whole chunk of data while the ADC performs the next DMA? it is
possible i guess.

3)
are there online tutorials or coding style guideliness for C for DSP?

Re: newbie: FIFOs and correlation algorithm in C for TI DSPs

Quoted text here. Click to load it

FIFOs are generally implemented as circular buffers. Your C code appears
to do that, but ignores the chip's hardware support for circular
buffers. Once the circular data buffer is set up -- you do that once at
initialization -- A correlation using the MAC* instruction takes fewer
than half a dozen op codes. If your compiler doesn't have a macro to do
that, use in-line assembly.

Jerry
_________________________
* Multiply And Accumulate.
--
... the worst possible design that just meets the specification - almost
a definition of practical engineering.                     .. Chris Bore
We've slightly trimmed the long signature. Click to see the full one.
Re: newbie: FIFOs and correlation algorithm in C for TI DSPs
Quoted text here. Click to load it

thanks, i'll search for them and take a look at it

Quoted text here. Click to load it

well it's stereo cause i've real and imaginary parts to treat :)
though im talking of 100MSPS, not audio stuff. You think i could fit
baseband signal processing, FFT, etc, in a 1800MIPS DSP? cause so far
i dont see it happening.

Quoted text here. Click to load it

thanks, i'll keep that in mind and try to "inline" whenever it's
possible

Quoted text here. Click to load it

Re: newbie: FIFOs and correlation algorithm in C for TI DSPs

Quoted text here. Click to load it
from
multiply-accumulate
Quoted text here. Click to load it
you
not
assembly
a
function
buffers."
Quoted text here. Click to load it
to
due

[BG] Not a chance!  If you want to do processing at 100 MSPS you'll need a
very powerful DSP.  If you're doing communications you may want a digital
down-converter chip between the ADC and the DSP.  That chip will do a lot of
the heavy duty filtering and demodulation to get you down to baseband.  That
will leave a more reasonable data rate for you to deal with in the DSP.  You
said you're an FPGA guy so why not put in a small relatively inexpensive
FPGA to do the first part of the work and then do the rest on a DSP.  I
don't know if this will be of interest or not, but TI's 6416 DSP comes in
speeds up to 1 GHz and has coprocessors for Turbo and Viterbi decoding.  I
think you can buy a 6416 DSP Starter Kit (DSK) from spectrum digital for
$400 or so.

Quoted text here. Click to load it
following
doing

[BG]  I think the compiler will often do this for you if you turn on
optimization and set a inlining threshold.  It's a tradeoff between code
size and execution speed...



Re: newbie: FIFOs and correlation algorithm in C for TI DSPs
Quoted text here. Click to load it

thanks for the suggestion, but what it made attractive the DSP was
it's FP capabilities, using the FPGA, i will implement my current
algorithms (not that there's anything wrong with that! :) ) but they
are "limited" in precision.
 
Quoted text here. Click to load it

thanks! i saw it on TI's site too, it's very interesting for hobby,
too bad it has only audio codecs and not video.

Quoted text here. Click to load it

i need speed :)

Site Timeline