MSP430F1612: generating sinusoidal signals

OK, I've found this reference:

DMA eases CPU's workload for waveform generation Code uses the fewest cycles to implement periodic waveform with DACs.

Mike Mitchell, Texas Instruments, Houston, TX; Edited by Brad Thompson and Fran Granville -- EDN, 12/5/2005

Not sure if something better can be done with this processor in terms of periodic waveform generation.

Any ideas?

Marius Hancu

DMA is good when you _already_ have the samples (a period) stored somewhere in the DMA accessible memory. If this is the case then - there you are. But in case by "generating", in your original message, you mean you need to calculate those samples, then I suggest you have a look at "Table look-up and interpolate" algorithms (you can find an Application Note on TI's page, I think it was written for '2x DSPs).

Succes :-) Adrian

Does the chip incorporate a DDS? If it does then maybe that is what you are looking for? I believe you can get DDS chips that a uC can interface to. They are also pretty straight forward to implement in an FPGA too. You could implement a DDS in software but only if it was very low frequency.

6KHz sounds too high for that approach though.

Paul.

It depends what frequency accuracy / frequency step is needed and what the spurious response requirements are.

In the beginning of that article, there was a simplistic calculation about using a programmed approach to generate a 1 kHz sine wave using a 32 kHz sample and interrupt rate. The waveform looks good on an oscilloscope even without the LPF, but for audio applications, this would be an overkill.

For audio applications just over 2-3 times the highest sine wave frequency should be enough.

If the highest sine frequency you needed is 6 kHz, then 16 kHz might be the suitable interrupt rate, which would be 1/2 of the interrupt rate of the initial 32 kHz programmed case, so the load figures would also be one half of that example.

The numerically controlled oscillator can be used to generate quite clean waveforms with modest sampling frequencies.

In this case, for each frequency that needs to be generated, perhaps a

16 bit phase accumulator would be enough. At each interrupt, a phase increment (depending of the frequency needed) is added to the phase accumulator, which may freely overflow. The highest bits of the phase accumulator (say 8 bits) are used to address the sine look-up table and the table element value is loaded into the DAC. In this case the frequency tuning step is 16000 Hz/65536 or 0,24 Hz and the look-up table would contain 256 elements.

As long as the sampling frequency is not a harmonic multiple of the sine wave frequency, different elements in the look-up table are addressed at different cycles, so even when observing the waveform before the LPF with an oscilloscope, after a few overlapping traces, a clean sine wave will appear on the screen.

Of course, other phase accumulator sizes and look-up table sizes can be used, but these involve some extra shift instructions.

In the article, the 32 kHz sampling rate with 1 MHz crystal frequency caused 58 % load for a single output frequency, so with 16 kHz sample rate would be above 29 %, due to the extra instructions to extract the high bits from the phase accumulator. With 8 MHz crystal frequency, the load would be about 4 %.

Paul

OK - forget all of that. My new reader wasn't showing *any* of the other responses in this thread. I think it's a problem with the tiscali news service.

Need to change... or just use google groups.

Regards,

Paul.

... snip ...

See my sig. You don't want to use google.

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Thanks - I agree with you about not wanting to use google.

Regards,

Paul.