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memory mapped IO

Hello,

I have a reference board that I am trying to bring up an ethernet device. I am wondering if the memory mapped io register layout for ethernet is standard? If so, what is the name of the document(s) I need for this register map?

Because my question deals on wether or not mmio for ethernet is standardized, the specific chip shouldn't matter.

Thanks for your time.

Cheers, Pete

Reply to
pete
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Yes, quite. Some processors, like ARM, don't have the concept of IO space altogether -- just memory.

The data sheet for the particular ethernet controller.

It *does* matter. What exactly do your mean by "standardized"?

Vadim

Reply to
Vadim Borshchev

Thanks for your reply. What I meant by standardized is like the PCI configuration space. For example, given the class code, you can set or get a few "standard" registers such as a Base Address Register at a standard offset of the device if it has one.

I do have a few of the data sheets for this device, the nForce4 CK804. The two main files I have been using, Register Spec and BIOS Porting Guide, mention nothing on the contents of the MMIO. It only mentions that the BAR for it should be setup.

Thanks again.

Cheers, Pete

Reply to
pete

You could possibly find more information in Linux-related groups or forums.

Vadim

Reply to
Vadim Borshchev

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