memory mapped I/O access question

The memory map has the read/write access for each hardware devices. If the hardware device only has read access, and we try to perform write operation, that means the operation is denied. And I assume error will be generated, is that correct?

please advice. thanks...

Reply to
Ken
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Maybe, maybe not.

On most targets I've seen, the write cycle will just be ignored by the peripheral. On some targets you will generate a bus fault.

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Grant Edwards
grante@visi.com
Reply to
Grant Edwards

When you are talking about a memory map with R/W access, this would suggest that some kind of memory management unit (MMU) is used.

It depends how the address decoding of the device is performed. If the address decoding includes the R/W signal, the device will not be selected at all and nothing happens.

However, if the address decoder does not contain the R/W signal and the R/W signal is completely ignored by the device, the device thinks this is an ordinary read operation and activates the transmitters in order to send the data to the CPU. Since the CPU is now also trying to write data, there is going to be a clash on the data bus and in practice a short circuit from Vcc through the data bus to the ground of the other device, when dissimilar bit values are driven on the same line.

This will cause a high short circuit current to flow, but since bus transceivers usually have some kind of current limitation just for this case, no permanent damage should occur, however, the current may cause a severe voltage dip in a badly decoupled Vcc line and if this illegal access happens frequently, it will cause extra power dissipation.

If the MMU was set for R/W access, probably nothing happens, since the MMU did not detect an error, but if the short circuit caused a large Vcc swing, the processor may cause a spurious reset or even smoke may be generated in extreme cases :-).

Paul

Reply to
Paul Keinanen

And on some setups there's the possibility someone has mapped a write-only register at the same location.

Robert

Reply to
Robert Adsett

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