Maxim MAXQ MCU

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I've just received some info on the new Maxim MAXQ microcontroller. It
looks rather interesting and is aimed at the PIC/AVR/MSP430 part of the
market. Whether we need another 8- or 16-bit architecture is debatable
with cheap 32-bit devices like the LPC2000 becoming available, but I'd
like to have a play with it.

Leon
--
Leon Heller, G1HSM
Email: snipped-for-privacy@dsl.pipex.com
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Re: Maxim MAXQ MCU

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  Any URL's or PDF's ?
If it's a new core, that would be brave. Anyone remember cyantechnology?

  Maxim could easily follow AnalogDevices (ADuC8xx), TI (MSC12xx),
Cygnal (C8051F350) into the high performance ADC+uC market, but surely
it's a
no-brainer to do this using their proven single clock C51 core, and
their proven high end ADC experience.
  The MAX765x seemed a good 'first step' into the mixed signal arena.
-jg


Re: Maxim MAXQ MCU


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No, I checked. The new chips are discussed at length in the Maxim
Microcontroller Engineering Review Volume 3 I received in the post this
morning.

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There are basically two versions with the same architecture, the MAXQ10
is 8-bits and the MAQ20 is 16-bits. They both have a 16-bit instruction
word and a single 'MOVE' instruction on which all the other instructions
are based. A Harvard memory organisation is employed, but access to
program memory is available.  The stack is hardware, but a software
stack can also be maintained. There is lots more stuff, but I can't be
bothered to summarise it. 8-)

They also have several pages of simulated benchmarks showing how it
compares with the PIC,AVR and MSP430.

Leon
--
Leon Heller, G1HSM
Email: snipped-for-privacy@dsl.pipex.com
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Re: Maxim MAXQ MCU
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  Thanks, that's enough to find :
http://pdfserv.maxim-ic.com/en/ej/MER_3.pdf
  for the others who will be interested..

-jg


Re: Maxim MAXQ MCU
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  Partial information only, but they deserve a medal for courage.

  Most telling text :  " Simulations replace with MAXQ2000 post layout
sim numbers " :)

  Real, debugged device sampling would seem some way off. Microchip are
still tinkering/pre-release on their dsPIC some 3 years after the first
hoop-la.

  Best looking feature : The deterministic cycle counts, and single
cycle DJNZ and RET(conditional)

  Not mentioned anywhere are actual MHz limits, so this may be like the
1996 AVR data book I have with 24MHz specs, that soon lurched downward
as real numbers arrived from real corner silicon.

  It will need to be probably > 30MHz to get on anyones' radar

  Acillies Heel: Not enough info, but the fixed stack looks a problem area.

  Code-Knee, or memory-reach are important comparison points, and the
info given is not enough to decide that.

  They have one of the strangest OPCODE descriptions I have ever seen,
so it is not possible to detemine the reach-corners ( and thus at
what data-sizes your code suddenly gets bigger )

  Telling Omission ?: No benchmarks with 80C51, and eZ8 devices. Both
these have direct memory access opcodes, and the Z8 also includes a
register frame pointer. For the small data sets of embedded
microcontrollers, this makes for smaller code size.

  Software and emulation : ?

-jg


Re: Maxim MAXQ MCU
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I noticed that they compared their architecture against PIC16 instead
of PIC18 to make theirs look better.

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