M32C Port 9 DDR unlocking

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I am using the M32C/83 and bit banging I2C out on port 9.  Port 9 requires
the data direction register to be unlocked via PRCR before writing to PD9.
Occasionally, PD9 isn't getting set and one of my I2C pins does not go low
when it should.  Bad things happen after that.

The H/W manual states that no interrupts or DMA should occur between the
unlocking of PD9 and the writing of PD9.  I lock out all maskable interrupts
and ensure the unlock and PD9 access were contiguous.

Any suggestions or clarifications welcome.

(I'm thinking of reading back and verifying PD9 after I write to it and
rewrite if necessary.  Feels dirty...)


John G.



Re: M32C Port 9 DDR unlocking
Hi John,

 I've been using the M16C for 4 years and the M32C/83 for two.
 I've never had problems with PD9 but I've never had to reconfigure
 the direction of PD9 at run time in a way that you are doing now, that is,
 continuosly. Therefore I can't be any help.

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this might help!

ciao,
 Enrico

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Re: M32C Port 9 DDR unlocking
Quoted text here. Click to load it
is,
requires
PD9.
low
interrupts

I have used the M16C for bit banging I2C and I've also had to unlock PD9,
though not for I2C but for key scan. It went something like this...
(Mitsubishi compiler)

#if defined(KEYPORTDDR_NEEDS_UNLOCK)
    asm( " FCLR I");
    PRCR = 4; // unlock DDR, not interruptable
    KEYPORTDDR = scan_table[1];
    // enable interrupts
    asm( " FSET I");
#else
    KEYPORTDDR = scan_table[1];
#endif

where KEYPORTDDR was for port 9. I didn't have any DMA running.

So bit banging I2C on port 9 is likely to be slow because you'll need the
unlock for every bit/clock. But you'll probably need the interrupt
disable/enable anyway  to stop port bit modifications from interfering - if
they're messed with in interrupts.

Peter



Re: M32C Port 9 DDR unlocking
Thanks.


John G.



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