jtag debug vs trace

Hi, As a novice I am confused at the difference between JTAG debug and trace. As I know JTAG is used for debug, and normally it has 5 pins, with background and foreground support, we can run debug software tool on host PC to control the embedded processor, this way debug is done. Then comes "trace", on PowerPC it has both JTAG and TRACE interface, and I was told TRACE is also used for debugging. Is there any document about what TRACE is?

Thanks.

Reply to
Jee
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trace is the record of a instruction sequence what happend before the trigger point (e.g. a breakpoint). With other words, a trace feature is usefull if a breakpoint triggers and you like to see what reasons were therefore and why the CPU arrived at the breakpoint location.

Some JTAG CPUs have seperate connectors (e.g. OCDS Level1 and Level2) to record the instructions by data and addressbus with external trace memory. Other embedded CPUs have internal trace fifo (e.g. Motorolas 9S8) what can be read out over JTAG or BDM or similar Interfaces even while CPU is running. Some of the new controllers do not have a test mode what allows to access external bus lines and even the special bondout chips are very expensive and make many trouble for emulator manufacturers. The benefit of external trace is the bandwidth combined with complex trigger conditions but for most problems simple internal trace memory will do the job why I think this will be the future.

Reply to
Janvi

Departing from PowerPC ARM's trace solution makes use of an Embedded Trace Macrocells which essentially snoops on the core an outputs a highly compressed stream which can be reconstructed into an historical record of the execution of the processor and memory transfers.

This is exceedingly useful for debugging several classes of problems, particularly ones which do not occur when a conventional debugger is attached due to the debugger changing the timing characteristics of the system.

The ETM also includes powerful filtering capabilities to for trace port bandwidth conservation.

Some PowerPC processors have a system called NEXUS which is based on the same general idea but most of the implementations I know of aren't as powerful as the ETM based solution see

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for details.

Since trace is non invasive it can also be used for non invasive profiling of release code.

-p

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Paul Gotch
CoreSight Tools
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Reply to
paul.gotch

Janvi, Your explanation makes sense on how TRACE works, but I am confused at onw thing: For all the embedded system development I see, there is a on-host debugger, like Single Step from WindRiver, it's these debuggers to issue the instruction through JTAG/BDM interface to the embedded processor, and it's these debuggers' knowledge where the breakpoints are, then these debuggers should be able to tell the user how the breakpoint was triggered. Does that mean that TRACE is only useful when the on-host debugger does not provide such infor?

Regards.

Reply to
bill

JTAG is software debugging. Trace is for hardware-level debugging and can be used as the equivalent to a logic analyzer.

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Reply to
Kevin D. Quitt

In article , Kevin D. Quitt writes

Trace is used for SW debugging as well. It is used (extensively) on ICE which is why it is also put on some JTAG systems via an additional connector

/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\ \/\/\/\/\ Chris Hills Staffs England /\/\/\/\/\ /\/\/ snipped-for-privacy@phaedsys.org

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Reply to
Chris Hills

Strictly speaking, trace is a functionality (like breakpoints) that facilitates debugging. JTAG on the other hand, is an on-chip resource that allows boundary scan operations to be performed. This means that 'tracing' can be implemented in multiple ways, one of which may even use the JTAG infrastructure. In other cases, like you mentioned, chips may have specialized tracing interfaces devoted to the operation. So there is fine distinction between the the 'trace' operation and a special 'trace' interface. The former may be possible without the latter. cheers,

-Bhanu

Reply to
Bhanu Nagendra P.

Well, In the normal case, JTAG/DBM is quite enough to debug the program. Though, JTAG/DBM is kind of STOP/GO debug. ( it mean process will be stopped )

For some cases, STOP/GO debug is not good enough. It might have possible side effect on the time-critical application or can not handle more complex application.

TRACE become another choice. We use to simplely record the instruction and data information. Then analyze the information, we might find out the reason. Or combined other hardware device for external debug trigger ( work as JTAG STOP/GO )

"bill" ??? news: snipped-for-privacy@posting.google.com ???...

memory.

controllers

even

future.

Reply to
ellope (ALOP)

I didn't mean to imply it wasn't - just that it provides a lot more information than the typical software debugger. I've used a logic analyzer to debug software on numerous occasions.

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Reply to
Kevin D. Quitt

I use trace with an ICE which does a lot more that a Logic analyser. In fact I have found a good ICE and a digital storage scope removes the need for a logic analyser.

On the other hand if all you have is a JTAg debugger you are probably going to need a logic analyser.

However these sort of discussions are pointless unless face to face over a good bottle of scotch :-) Usually followed by port and stilton for a discussion on where to put the {}

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Reply to
Chris Hills

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