Hello,
I am designing a board with IBM PPC 405EP and TI DSP TMS320C6711C. I want put those devices in a single JTAG chain so that i can carry out boundary scan as well do the emulation by having jumpers appropriately.
But i have one problem with defining a initial state for nTRST signal. In DSP it is pulled low internally and datasheet specifies not to put a pull-up on this line. But PPC datasheet says to put a pull-up on this line. Can anybody help me sort out this issue.
I had copied the references made in both datasheets below. Pls help...
TI Dsp "The TMS320C6711/11B/11C/11D DSP requires that both nTRST and nRESET resets be asserted upon power up to be properly initialized. While nRESET initializes the DSP core, nTRST initializes the DSP's emulation logic.Both resets are required for proper operation. While both nTRST and nRESET need to be asserted upon power up, only nRESET needs to be released for the DSP to boot properly. TRST may be asserted indefinitely for normal operation, keeping the JTAG port interface and DSP's emulation logic in the reset state. nTRST only needs to be released when it is necessary to use a JTAG controller to debug the DSP or exercise the DSP's boundary scan functionality. For maximum reliability, the TMS320C6711/11B/11C/11D DSP includes an internal pulldown (IPD) on the nTRST pin to ensure that TRST will always be asserted upon power up and the DSP's internal emulation logic will always be properly initialized. JTAG controllers from Texas Instruments actively drive nTRST high. However, some third-party JTAG controllers may not drive nTRST high but expect the use of an external pullup resistor on nTRST. When using this type of JTAG controller, assert nTRST to initialize the DSP after powerup and externally drive nTRST high before attempting any emulation or boundary scan operations. Following the release of nRESET, the low-to-high transition of TRST must be "seen" to latch the state of EMU1 and EMU0. The EMU[1:0] pins configure the device for either Boundary Scan mode or Emulation mode."
IBM PPC 405EP " nTRST on the PPC405 based processors shouldbe pulled up with a 10K resistor. Also note that nTRST must be asserted low in response to a power-on or system reset or else the processor may not boot reliably. It is recommended that nTRST from the JTAG connector be logically ORed with power-on reset of the board before being connected to nTRST on the processor"
Pls suggest some solutions....