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- Interrupt problem with Z180 CPU
September 22, 2003, 7:31 pm
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Re: Interrupt problem with Z180 CPU
Only the high 3 bits of the vector are from IL, the low 5 bits of the vector
are 00100 for Timer 0. Using your example, the address of the ISR will be
fetched from 01034h, not 1074h.
Just to be clear, the vector table holds the address of the ISR, not the first
instruction of the ISR.
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