Interfacing SJA1000 to ISA bus

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Can anybody point me to some information about interfacing a SJA1000 CAN
chip to the ISA bus?

This chip has an Intel type multiplexed address and data byte and an input
for ALE.
How can i produce ALE signal starting from ISA signals?

Can anybody point me in the right direction?

Thank's in advance

Massimo




Re: Interfacing SJA1000 to ISA bus

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ISA bus has ALE signal, it is pin B28.

  Vadim

R: Interfacing SJA1000 to ISA bus
Thank's for your answer.
Do you know where i can find ISA ALE signal timing diagram on the net (or,
better, complete isa timing diadrams)?
Thank's in advance

Massimo

snipped-for-privacy@picsel.com...
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Re: R: Interfacing SJA1000 to ISA bus

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Google.  Search for "isa bus timing" - plenty of links.

HTH,
  Vadim

Re: Interfacing SJA1000 to ISA bus
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But are address/data multiplexed?

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R: Interfacing SJA1000 to ISA bus
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Yes, SJA1000 multiplex address and data;

I solved the problem reserving 2 specific address inPC io space: one for
address and one for data:
when the pc data bus contain address for SJA1000 i haven't to generate rd/wr
signals (and this isn't a problem), but i have to generate AEN used by the
SJA1000 to catch the address, and thats's the problem!;
When the pc data bus contain data for SJA1000 i have to generate rd/wr
signals (this isn't a problem), ant at the end or the read/write cycle i
have to rise up AEN
I think that is'n possible use ISA ALE signal because i think that this line
switch on every I/O cycle.Is it correct?

Thank's

Massimo



Re: R: Interfacing SJA1000 to ISA bus

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I meant ISA.  IIRC, they aren't.  If you wanted to access the
SJA transparantly (using normal read/write or input/output),
you'd have to design a state-machine that does the address/data
multiplexing and generates the ALE and RD/WR signals.

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It's not possible to use it directly without some other octal
buffers and some stateful logic.

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Re: Interfacing SJA1000 to ISA bus
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Yes, i work on it with, but i post a question to the newsgroup to see if
anyone have yet made it and can help me...if there is an application note or
a tutorial on the net...

thank's

Massimo





Re: R: Interfacing SJA1000 to ISA bus
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Yes, the ALE signal is actually the same signal as generated by the x86
CPU even though it no longer comes from the CPU.  The ISA bus is simply
the CPU address and data demultiplexed along with some decoded timing
strobes.  

Your interface will need to be a mux to remultiplex the address and data
and then you will need to regenrate some timing because the ALE will not
be what you need to feed into the SJA1000.  This is because you need to
hold the address beyond the falling edge of the ALE.  So either generate
an earlier ALE or delay the mux control.  Or regenerate all of it
yourself in a PLD.  

I recommend that you get the book "AT Bus Design" by Solari.  For all
practical purposes this is the ISA bus spec.  

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Rick "rickman" Collins

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Re: Interfacing SJA1000 to ISA bus

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AFAIR, no (I touched ISA stuff the last time 13 years ago).  Sorry, non't
have working examples at hand, but interfacing was quite straightforward.

  Vadim

R: Interfacing SJA1000 to ISA bus
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ISA address/data are not multiplexed, SJA1000 yes

Massimo



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