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Implement IIR Filter on FPGA

hi people,

I'm designing filter system called IIR filter on the FPGA kit, but it doesn't work when I implement on FPGA. When i iput the signals, the output results seem to not get any thing. I do not know whether my source code is wrong or another reason. The FPGA kit operate normally with other sources which i loaded in the past.

Can anyone give me some advices to test what parts in my project do not work or give me some idea to test anything. I am in the mess. I hope everyone can show me.

I am looking forward hearing from people soon,

Reply to
Gordon Freeman
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The above mail gives me the feeling that you do not really understand the technology you are using. Debugging such a situation should not be too hard if you grasp how the different parts work. If something is 'not working' from end to end, just take a look at what's happening in the middle of the process; predict what kind of signal or behaviour you would expect at that place, then measure and see if things match.

You did not give much information about your project, but I'd suggest adding some code to output the signal at various stages of the process: just after the A/D converter (if you are using one), just before the IIR block, etc.

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Reply to
Ico

Fix line 42

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Chuck F (cbfalconer at maineline dot net)
   Available for consulting/temporary embedded and systems.
Reply to
CBFalconer

The problem is he's actually _missing_ line 42. He went from 41 right on to 43. It's probably on the floor underneath his workbench...

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Grant Edwards                   grante             Yow!  I feel partially
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Reply to
Grant Edwards

Just because the answer to the ultimate question is 42 does not mean that the problem is on line 42. Since the OP did not ask the ultimate question, I believe that the answer lies in fixing line 3.

Anton Erasmus

Reply to
Anton Erasmus

Hmmm... following that line of reasoning, we'll immediately need a new designated answer for "What's 6 multiplied by 7?", since, this not being the ultimate question, its answer shouldn't be 42, right? That's going to be somewhat tricky to explain to teachers worldwide ;->

Reply to
Hans-Bernhard Bröker

Hi everyone! Thank you for your reply! I used ModelSim to simulate. The result is the same when I canculate by calculator. But when I implement on FPGA, it don't work too. I design IIR filter with 10 orders. I use Matlab to generate coefficients for filter (b(k) and a(k)). For coefficient "b", I multiply with 2^14 and multiply with 2^5 for coefficent "a". After that I round them. These coefficients stored in LUT. I use SDA for filter. Because I think IIR filter include tow FIR filter. One filter with coefficient "b" and one with coefficient "a". Is it right?

Reply to
Gordon Freeman

I do not think it would be do much of a problem since the whole earth was built as a computing entity to find the ultimate question. Any teacher who finds this whole thing contradictory, is not part of the computing entity, hence MUST be alien. :)

Regards Anton Erasmus

Reply to
Anton Erasmus

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