Hydra: a FPGA-based chess computer

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The Hydra chess computer looks like it is going to be the
new world computer chess champion, and it is getting close
to being the best chess player, human or computer.

What does this have to do with embedded systems? Hydra is
FPGA-based, not PC-based - carrying on the tradition of
Deep Blue and swinging the pendulum back to hardware.

From what I have been able to gather, The Hydra chess
computer runs on 8 Alpha-Data PCI ADM-XRC Xilinx Virtex-EM
V405E-V812E FPGA Cards.

It was programmed by Chrilly Donninger in two languages;
C for the high-level behavioral prototyping and specification
language and Verilog for the low-level RTL implementation
language. Chrilly has also been working on a computer that
plays a good game of Go using pattern recognition and possibly
cellular automata.

(The Hydra project was originally known as the Brutus project.)

http://www.alpha-data.com/adm-xrc.html <-- FPGA board
http://www.chessbase.com/newsdetail.asp?newsid22%1 <-- Brutus
http://www.hydrachess.com/ <-- this website isworthless junk

Guy Macon <http://www.guymacon.com

Re: Hydra: a FPGA-based chess computer
"Guy Macon" <http://www.guymacon.com wrote in message
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This always has fascinated me, but I've never dug down deep into the details
of what makes one version of a chess program better or worse than another.
How is this an improvement over deep blue, other than moving the computation
and data moving to specialized hardware that does similar things to code? Is
it only speed, or is there also an algorithmic advantage?


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