how do PSoCs compare to AVRs and PICs?

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Hi - PICs and AVRs enjoy a large amount of popularity among both
professionals and hobbyists - but PSoCs don't seem to be very popular among
either group. Is there any particular reason that AVRs and PICs are so much
more popular than PSoCs? How do they compare feature, price, and speed
wise? Thanks,

Michael

Re: how do PSoCs compare to AVRs and PICs?

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There aren't any cheap or free C compilers available for it.



Re: how do PSoCs compare to AVRs and PICs?
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The are like pears and apples.
PSoCs are a cpu kernel with some generic analog circuit.
Wheras the PIC and AVR are a cpu, some digital peripherals and
usually an ADC.

Rene
--
Ing.Buero R.Tschaggelar - http://www.ibrtses.com
& commercial newsgroups - http://www.talkto.net


Re: how do PSoCs compare to AVRs and PICs?
I think most hobbyists are familiar with the AVRs and PICs and are
sticking with them. PSoC is only a few years old.  It's definitly
significant departure from the typical peripherals found on AVR and
PICs with much more flexible routing and setup.

As far as comparing, the CPU is probably comparable with mid-range
PIC.  AVRs have better number crunching ability than the PSoC.  The
configurability of the PSoC peripherals is untouchable for now.  It
really goes a long way in reducing the number of other parts on the
board, however some of the analog bits are so-so.

Untill recently, Cypress hasn't attempted to push the PSoC for the
hobbiest market, and there haven't been any affordable development
tools for the chip.  I suspect this new design contest will start
changing that.

-J

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Re: how do PSoCs compare to AVRs and PICs?
On Mon, 22 Dec 2003 23:02:13 GMT, Michael

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PoSC's are much slower than the AVR.   I recall that they use
something like 10 or 12 clock cycles per instruction.  Where as AVR
can do one instruction per clock cycle by using pipelining for most
instructions.  Perhaps if speed is not important they might be useful.

regards,
Johnny.

Re: how do PSoCs compare to AVRs and PICs?
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I think you're exaggerating the clock cycles by about a factor
of 2, but, regardless, the Cypress processor's architecture
and instruction set is quite primitive compared to the AVR.

Re: how do PSoCs compare to AVRs and PICs?
The PSoC instruction set nemonics actually look like 8051 to me, minus
R0 indirect addressing and bit addressable RAM.

Most of the instructions are in the 5-7 cycle range, with RMW types
taking around 8 or 9, and the CPU runs up to 24 Mhz.

The CPU isn't the best, but I have seen a diagram of the chip die, and
the CPU takes up around %5 of the space, the I2C controller actually
consumes more room!  The majority of die space is dedicated to the
configurable blocks, especially the analog hardware and muxes.

I was never a fan of the mid-range pic, the banking and scratch-pad
RAM were all screwed up AFAIK.  Why i/o registers where plopped in the
same linear address range as general purpose ram, I will never know.
The cypress CPU is a bit slower, but coding is alot easier compared to
the PIC.

-Jim



snipped-for-privacy@mojaveg.iwvisp.com (Everett M. Greene) wrote in message
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Re: how do PSoCs compare to AVRs and PICs?

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Re: how do PSoCs compare to AVRs and PICs?

Hi Jim,

I agree with your comments about the anachronisms of the PIC.  That is
why I mention the AVR.  I think the PIC is not so bad if you are
coding in assembly, but not as well suited to c compilers for the
reasons you mention.  Since the latest AVRs have been released about 1
year ago with reduced die sizes, they are very competitive if you are
looking at performance per dollar compared to PIC.

regards,
Johnny.





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