High frequency PWM generation

Hi All ,

I am working with a 8 bit Atmega2560 uC, when operating at 16 Mhz clock the maximum frequency of PWM I can generate is ~31Khz at 8 bit resolution. Are there any external PWM generator ICs which I can use to generate higher frequency PWM signals?

Also If I want to sin modulate the PWM with sin wave of 4khz then is

31khz (PWM Wave) enough?

Any guideline would be appreciated a lot! BR Rate

Reply to
ratemonotonic
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There are quite many of the high res high speed analog and digital PWM ICs intended for the audio. Check the websites of ST, TI, Zetex, Freescale.

It depends. Generally, for the PWM the Nyquist condition applies in the same way as for the PCM.

How much is "a lot of appreciation" ?

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

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Reply to
Vladimir Vassilevsky

There are some other AVRs which has PLLs onchip. AT90PWM3 has a 64 MHz PLL giving 250 kHz PWM frequency at 8 bit resolution. There are some tinyAVRs with PLL as well.

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Ulf Samuelsson
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Reply to
Ulf Samuelsson

Yes, you could use a CPLD for this, for example

There are also some uC that allow variable-resolution PWM. In your example you don't really need 256 steps of time precison, if you can only get 8 pulses per sine. You might choose 64 pulses of 32 step granularity, for a 'better' sine wave.

You can also generate Sine by step in both Axes - ie if you vary the PWM period per PWM cycle, yu can get higher precision sine frequencies. What is your desired Frequency step size ?

Other uC have higher resolution PWM - in the same core you have AT90PWM (but not with same code resource), tho this could become your slave chip. Look for Motor Control devices, for Infineon, TI, ADI, etc

Depends on what level of distortion is enough, and your step size needs. What is the Sine output ultimately used for ?

-jg

Reply to
Jim Granville

Lot of IC companies provide this. Check TI, ADI, Infineon .

Karthik Balaguru

Reply to
karthikbalaguru

Hi jg,

Many thanks , Good suggestion about reducing the PWM resulution from 8 bit (256 steps), that is certainly a possibility. as you say ,the only problem bieng that of the Sine wave resolution will reduce , e.g. if I have 256 bit resolution then I can represent a better range of sin wave values in my Look up table. A trade off.

I am actually sin modulation the PWM wave(s) , and the PWM waves will be fed to full or half H-bridge depending on the application.

Also on the processor I am using I have found a fast PWM mode where instead of a up-down counter(triangle), I can use a up counter(saw tooth) and double the maximum frequency. Thats another possible solution. I dont know the fundamentals of what the diffrence in sine wave would be if I use a sawtooth instead of traingle. I am in the processes of researching (googleing it!).

Thanks, Rate

Reply to
ratemonotonic

Many thanks, for the suggestions. Being a new engineer I literally " appreciate a lot!" as a matter of fact you can actually feel the appreciation if you close your eyes :-) . Moreover I can buy you a beer if we some day meet in our short life span.

Reply to
ratemonotonic

Correct, you can of course have a few tables, and choose more X and Y steps, as the Sine frequency drops and allows this.

dF Frequency Step Size ?

The SqWave output does not 'know' it was generated one way or the other :)

Where triangle wave is used, is when you want multiple PWMs and some phase relationship between them. With triangle, two slice levels give symmetric dead-bands, whilst sawtooth has deadband on the ramp, and none on the flyback.

In your application, what does the H Bridge drive, and to what Power. You may find the PWM frequency is 'self selected' by the Bridge power loss requirements.

You can also make a more complex Table, that stores both PWM% and Timebase, and that gives more precise frequency control, and more precise voltage definition - if those matter.

-jg

Reply to
Jim Granville

hi jg,

I am wanting to generate two frequencies of sinus waves : 200 hz and

400hz for DQPSK modulation. Thus the Hbirdge is actually acting a a radio transmitter with an antenna attached to it as load. The step size of the sin LUT parsing is dependent on the frequency at which I update the comparator.

I do have two PWM signals , but I dont think there needs to be any phase correctness between them , as I am using one PWM to produce the

+ve part of a bipolar sine wave and the other one to produce the -ve part of the sine wave , I am doing this by using a Hbridge controller , with the high side pulled high always and just driving the low side fets with the PWMs. The H-Bridge controlled manages the prevention of shoot-thorugh by swithching off the high side apporpriately. Do you think that my assumption is correct? I think I might still have to have consideration for deadband to reduce power loss?

Yes , the more and more I am reading about H-Bridge control and class D amlifiers , the more your suggestions are getting more clear in my head.

BR Rate

Reply to
ratemonotonic

Nasal or cardiac? ;-)

Michael

Reply to
msg

Just in case these messages went to the cardiology usenet , I meant sinusoid ;-) .

Reply to
ratemonotonic

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