Has someone tried to add interrupt support to Riscy Pygness?

Sure, but there are also different problems. For example, a stepper motor hooked up to a bit-bang SPI bus that needs to be advanced 2000 times per second. You don't want too much jitter, so doing it in the timer ISR itself becomes a viable option.

It would be nice to have the option so you could choose to run the ISR in assembly, or a higher level language, depending on the particular circumstances. In my experience, I've written 90% of my ISR code in a higher level language.

If it only takes a half-dozen instruction to do a context switch, I'm sure it doesn't have to take more to set up an environment to run Forth in an interrupt context.

Reply to
Arlet Ottens
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I don't see any problem with having the inner interpreter poll for interrupts, as long as you carefully review words that alter stack pointers such as THROW and PAUSE. You may need to disable interrupts in parts of such words. I remember a story of someone who modified the inner interpreter on an early single-interrupt computer to emulate a multi-interrupt machine and it was a great success.

-Brad

Reply to
Brad

We're in trouble then because thoughts are abstractions so talking in the abstract cannot be overcome ;-).

[SNIP]

Jean-Francois Michaud

Reply to
Jean-Francois Michaud

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