Flash retention in uC at higher temps, experience?

I thought it was limited number of writes. But for certain packages (serial) it practically means unlimited as the protocol limits number of reads sufficiently.

M
Reply to
TheM
Loading thread data ...

remember how close?

I would guess the part went haywire and started overwriting the flash itself by some randomly executed code. Possibly the fuses were not set or were even ignored.

Mark

Reply to
TheM

it practically means

The Freescale chip has fast parallel access (35ns), like a slow SDRAM, and this page says "Unlimited Write and Read Cycles":

formatting link

--
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de
Reply to
Frank Buss

However, you said "But some bad experiences in storing data into the flash at that temp and even at 3.3V and higher."

That sure sounds mouth-watering. But my wife likes places where there is no winter (and now ours get colder every year ...) and I'd have a wee problem with the property tax rates up there. 2% or more is IMHO confiscatory. Oh, and I like proposition 13 (prop tax increase cap) in California because I do not trust politicians enough to toss them the keys to my bank account.

Ah, you shouldn't have written "drizzle", my wife would hate that kind of weather.

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

I sure miss those pubs in Cologne. We lived about 20 miles from there. A hop onto a train and 30 minutes later you were at Cologne Central. Then a stroll of a few minutes and you could have a nice cold Koelsch beer.

Hint for tourists going there: If you think you master German well enough and then discover that you can't understand a thing of what people in a Cologne pub are saying, that's normal. I didn't understand most of them either.

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

That's one of the methods I am thinking about. It would require a uC with at least twice the flash size but heck, that would be pretty cheap insurance. The switchover could be handled by a flag that will not get asserted before the whole transfer is complete. Only afterwards would the flag for the "old" flash area be disasserted.

The flag is the problem. Unfortunately uC manufacturers have not put that much thought into the reset routine. It just jumps to a fixed address and when the data there is corrupt the application is toast.

We already have another kind of memory in one application because of flash corruption. However, then the question arises: Why have flash in the first place?

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

remember how close?

Yeah but that would not be cool. 100W at 6ft isn't that much. Many applications must live in plastic boxes and there is always a chance someone with a 5W contractor radio stands right next to them. Or someone fires up a cell phone and the GSM ones can be particularly nasty here.

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

Aha! Thanks. Seems there is some hope. Although I am not much of an Infineon fan. The reaction time of their CA office can be, well, just like the name suggests, infinity.

Yes, like global warming :-)

Hold the tomatoes ...

Copy sectors 1-10 consecutively into RAM, write them to sectors 11-20, assert start location 11, disassert start location 1. A month later the other way around. And so on. Just like rotating a wood pile so it dries evenly.

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

Sure but that data won't help much. Next month's batch can be all different. One could just do the sector swaps often enough, maybe once a week. The max number of write cycles is very high these days, well in excess of 10000 times. AFAIK that number even goes up with temperature.

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

That's an option as well. Although it won't help with power failure duyring re-writes.

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

With sector specific ECC, you reduce the likelihood for sector specific reflashing and also reduce the time of reflash (full reflash/sector specific reflash).

If this kind of reducing the likelihood for a complete failure is not sufficient e.g. large capacitors for data retention, you have to go for a doubly/triple redundant system to avoid such problems.

Paul

Reply to
Paul Keinanen

This is a good idea as long as you do not perform these updates too often, overflowing the maximum flash write count for a specific cell/sector.

Paul

Reply to
Paul Keinanen

The black container will absorb more heat than the white one. (gen Physics :-) ) Try wrapping the container with shiny tape , see the result ..

sed in

re in

ides

or

itical

a
Reply to
ThanderMaX

True, if something gets us down to

Reply to
Joerg

It's >10000 times on most modern device, per datasheet. In reality more like 100000 times. So even if you do it once a week there will still be archeologists wondering what the heck these ancient folks had done.

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

applications must live in plastic boxes and there is always a

someone fires up a cell phone and the GSM ones can be

It could be a design with long supply wires (as antennas) and poor RF blocking caps close to uCPU.

Flash corruption due to EM field at 6 feet distance sounds a bit far fetched.

M
Reply to
TheM

it practically means

formatting link

Wow, looks like they are making progress. The last unit I used was 64K serial (I2C) from Ramtron and it was limited to 10^12 read/write cycles which came out as years at max I2C bus speed.

I love mram, however these things are sensitive to magnetic field, right? Still not exactly bullet proof.

M
Reply to
TheM

I suggest you paint your box or faceplate a different color.

Your aim should be to avoid producing temperatures that are not neccessary in direct sunlight.

RL

Reply to
legg

(serial) it practically means

formatting link

(I2C) from Ramtron

I2C bus speed.

First the Ramtron devices are FeRam not MRAM.

Second Ramtron has also been claiming unlimited writes for some time now. IIRC the limit was a function of axygen contamination. Apparently they solved that problem.

Robert

** Posted from
formatting link
**
Reply to
Robert Adsett

Not so easy on an existing product. But from experience it seems the temps weren't all that different between a black box and an off-white one. Maybe the off-white one crept up a little slower.

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.