External clock in cypress EZ-USB FX2

hello, I am working on a cypress chip. I want the communication between endpoints and host to work on external clock. Is it possible for chip to work on external clock without being in Slave FIFO or GPIF mode?

Regards Sanika

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sanika
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s

What other mode is there for transfers? I don't recall any other interface mode besides Slave or GPIF modes.

John Providenza

Reply to
johnp

Not sure about the answer to that BUT there is some small print about needing a clock when configuring something (a port perhaps) so before you switch to the external clock (if it is not there) you need to do some other configuring.

Reply to
Bill Davy

endpoint=

Other mode means default operation when neither slave fifo nor gpif is selected. And device communicates only with host using endpoints. And the ports A,B,C,D act as I/O ports not for transmitting signals regarding slave fifo and GPIF.

Regards Sanika

Reply to
sanika

endpoints

other

External clock is coming from CPLD. So when the CPLD is starts sending clock it sends HIGH on PA.6 This is what I am doing

Initialize will be called from main

////////////////////////////////////////////// #define clk_is_rdy ((IOA & 0x40) ? 1 : 0)

static void Initialize(void) { xdata char *deta = (xdata char*)0x3000; PORTACFG = 0x00; OEA = OEA & (0xBf);

CPUCS=0x10; // 48 MHz, CLKOUT output disabled. if(clk_is_rdy) { IFCONFIG=0x40; // External IFCLK,5 to 48MHz; A,B as normal ports. /*deta++ = 0xff; *deta++ = 0xff; *deta++ = 0xff; *deta++ = 0xff; *deta++ = 0x00; *deta++ = 0x00; *deta++ = 0x00; *deta++ = 0x00;*/ SYNCDELAY; } else { IFCONFIG=0xc0; // Internal IFCLK, 48MHz; A,B as normal ports. SYNCDELAY; /*deta++ = 0x00; *deta++ = 0x00; *deta++ = 0x00; *deta++ = 0x00; *deta++ = 0xff; *deta++ = 0xff; *deta++ = 0xff; *deta++ = 0xff; */ } REVCTL=0x03; SYNCDELAY; EP6CFG=0xe0; // 1110 0010 (bulk IN, 512 bytes, double-buffered) SYNCDELAY; EP2CFG=0xa2; // 1010 0010 (bulk OUT, 512 bytes, double-buffered) SYNCDELAY; FIFORESET = 0x80; SYNCDELAY; // NAK all requests from host. FIFORESET = 0x02; SYNCDELAY; // Reset individual EP (2,4,6,8) FIFORESET = 0x04; SYNCDELAY; FIFORESET = 0x06; SYNCDELAY; FIFORESET = 0x08; SYNCDELAY; FIFORESET = 0x00; SYNCDELAY; // Resume normal operation. EP2FIFOCFG = 0x00; // Make sure AUTOOUT=0. SYNCDELAY; // Be sure to clear the 2 buffers (double-buffered) (required!). OUTPKTEND = 0x82; SYNCDELAY; OUTPKTEND = 0x82; SYNCDELAY;

} ///////////////////////////////

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sanika

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