Ever 'souped up' the ADC on Renesas uC? - Page 2

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Re: Ever 'souped up' the ADC on Renesas uC?
Hello Steve,

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Well, yes. But it is easier to inject offsets. Adding four bits of
offset (in theory) takes just four resistors and four port pins.

Regards, Joerg

http://www.analogconsultants.com

Re: Ever 'souped up' the ADC on Renesas uC?
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  Do you REALLY need to do this ? - what about a better class of ADC,
like seen on the new Analog Devices ARMs - ADuC7019 et al ?
  These also have 12 bit, 1Msps, with typical spec of 0.5 LSB DNL,
so there is room to further average...
  [ They also have 12 bit DACs ]

  If you really must push the ADC, then consider a larger sweep ? : It is
better to sweep the injected offset over, say 16 LSB steps, and average
the results as you then smooth the step variances seen in SAR ADCs.
If you just go 1/4; 1/2; 3/4 you are too locked to a single error point.

  This trades off speed for more precision, and you are using the ADC as
a precision comparitor, and adding a Slope ADC underneath the std SAR one.

  I've heard various horror stories about some of the 'generic ADCs'
that come with uC. Many don't even fill out the MAX column, and only
spec typicals...

-jg


Re: Ever 'souped up' the ADC on Renesas uC?
Hello Jim,

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I need to. The reason is the usual: $$ and power consumption. The only
alternative would be an MSP430 but the versions with HW multiplier and
14bit ADC are too expensive and the specs on that ADC are, well, skimpy.
Got to stay around 2 1/2 bucks for the uC in qties.


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Yes, I just gave an example. I'll do a much larger sweep since this ADC
can be clocked at 10MHz and requires around 60 cycles to complete a
10bit conversion. I only need a few kHz of effective sample rate.

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That's exactly why I posted. The specs on the Renesas are a wee bit more
detailed than on the TI MSP series. But they still leave a lot to be
desired and every time I had asked any uC vendor for more info on more
analog details all I got was a blank stare.

Regards, Joerg

http://www.analogconsultants.com

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