Ensuring Timing constraints while coding

Dear Experts,

I was going through one of the thread in this group talking about worst case timing determination.

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The discussion in the above thread made me curious to understand the solution for following problem:

1)When we come up with a design which satisfies the requirement wrt timing needs of the product,how would you make sure in the coding phase that you are within the given spec? AFAIK this sort of timing requirements can be tested only after your coding is complete.Is there a way to make sure while coding itself to follow some guidelines so that you meet the given timing requirements?Can some experts around here throw some light or guide me with links which explains approaches to achieve this?

2)To give an example to make everyone understand,lets consider this(note this spec below is fictious so please dont look for accuracy of timing details in this example):

We have a audio decoding device,which need to decode the audio frames with in say 300 msecs.The audio presenting device need to pickup the decoded data and present it say with in 50 msecs from the time the decoded frames are available from the decoder.

How to make sure you create a task which will complete all the functions said above with in the given timing requirement?What sort of analysis people do to identify these timing related issues in code level?Suppose the task created does not meet the requirement what areas should I look into to correct it?

Lookingfarward for all your replys and advanced thanks for the same,

Regards, s.subbarayan

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Most of our products are derivatives of past products, so we take a baseline timing analysis from the most closely related product and do a delta analysis from that and assume standard coding practices. We also require that the analysis doesn't show that we use more then 50% of the resources (CPU thoughput and memory) to allow for feature creep. We use complexity factors to derive estimates of new functions, or may quickly prototype a new function if we are unsure.

Well is not a static thing, like, you do this analysis and you done and your sure it's all going to work. After the initial analysis is performed more detailed simulations are performed, on development boards, for instance, to increase your confidence during board layout. You try to catch any timing problems as early as you can.

Suppose the task created does not meet the requirement what areas

Rewriting the code in assembler, upgrading/adding HW to offload SW, relaxing the requirements, all depends what stage you are in the project and how strict the requirement really is, I've done all three....