What are the effects of over clocking a processor? One effect that i have personally noticed is that the processor heats up... Why is it so? .. Is there any possibility of unpredictable behavior?
- posted
17 years ago
What are the effects of over clocking a processor? One effect that i have personally noticed is that the processor heats up... Why is it so? .. Is there any possibility of unpredictable behavior?
On 12 Nov 2006 09:36:51 -0800, "adonis" wrote in comp.arch.embedded:
There are many possibilities, among them shortening the life of the processor or other circuitry in the system being pushed beyond its speed limit, and all sorts of intermittent failures.
-- Jack Klein Home: http://JK-Technology.Com FAQs for comp.lang.c http://c-faq.com/ comp.lang.c++ http://www.parashift.com/c++-faq-lite/alt.comp.lang.learn.c-c++ http://www.contrib.andrew.cmu.edu/~ajo/docs/FAQ-acllc.html
A quick web search found this article which although targeted to SoC design discusses power dissipation in CMOS; note the equations which include terms for frequency.
Regards,
Michael
The immediate impact of overclocking is that there is a shorter amount of time for the logic between registers to complete its task. Worse case scenario, the reduced clock period is not suffiicent to for the logic to complete this task, which results in utterly unpredictable and incorrect results. However, all digital design (at least the ones I've ever seen) will have some safety margin built into the maximum clock frequency. This margin is something of a safety net against things like process variations, temperature variations, odd signal integrity issues, routing issues etc. Typically, the margin will be 10% to 20%. Therefore, in a best case scenario you *could* increase your clock frequency by maybe up to 20% and still have a well behaved digital circuit. But lets face it, are you really going to notice 10% or so.
Yes, and there is a very simple reason for this - you have increased the clock frequency, resulting in logic that switches more frequently in a given time. This consumes more power and gives off more heat energy. The cooling system (heat sinks, fans etc) are probably rated for a certain clock frequency, which probably means your entire system board may well heat up. The nasty bit is increased temperature, increases semiconductor failure mechanism rate. As far as i can can remember its an exponential relationship (could be wrong?). Examples of such failure mechanisms include Electromigration
hope this helps
Hey michael...
Ptotal = Pdynamic + Pshort + Pleakage Pswitch = A * C * V2 * F Pshort = A (B/12) (V-2Vth)3 * F * T Pleakage = (Idiode + Isubthreshold) * V
A = Switching Activity C = Total Load Capacitance V = Supply Voltage F = Target Frequency B = Gain Factor T = Rise/Fall Time (gate inputs) Vth = Voltage Threshold
I understand from this equati> ad>
To add an other point on this ...
Energy = power x processing time
In an ideal system (ignoring power down etc), whilst increasing the clock frequency increases the power, it doesnt increase the energy since the processing time is reduced.
ad> Hey michael...
Once I was running 25MHz ADSP-2185 at 50MHz. No excessive heat, no problems at all. The mistake was found only by occasion.
I have heard the rumors that AD has a habit to assign the different speed grades to exactly the same chip for marketing purpose.
Another reason to downrate the chip is avoiding the export regulations. The export of anything higher then 25MHz has to be licensed. I believe many micros are rated at 25MHz only for because of that.
Ofcourse it was done by mistake.. though
Overclocking is not just heat. It can result in the very strange faults which occur only in the certain situations. Seen that trying to overclock the 486 in my old PC.
Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
Ohh.. i wasn't really aware of those export regulations...
Am interested in knowing about these strange faults!!
Vladimir Vassilevsky wrote:
For example, if you are playing "Doom", and encounter a monster commonly called "translucent pig" anywhere in the current view, the system crashes immediately. However everything else seem to work perfect unless you play "Doom" and meet with this particular kind of monster. The common PC testers can't catch any problems.
Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
well it could lead to highly intermittent metastability issues if the clock frequency was very close to the the timing of the critical path. So for example, lets say you have an occasional metastability issue for certain inputs in a pipelined multipler within a processor. Most of the time it'll work ok, but every now and again you'll get weird results. And trying to replicate the issue with the same inputs to the multipler may not even even generate the same result due the randomness of metastability.
thats just > Ohh.. i wasn't really aware of those export regulations...
I understand the literal meaning of metastability.. but what does it really mean in terms of hardware and what is critical path. How does data in pipeline possibly get affected by the over clocking?.. At least this is not the expected behavior... Then how does one explain this!!! With Over clocking...your process will be faster than desired and this will load some part of the processor.. But will it have affect on the instruction and data fetches and there execution??
Any kind of logic needs some time to complete the operation. If you are trying to latch the result before the output is settled for good, there are chances that you will latch on the junk. And this is what may happen when you are trying to overclock.
How does
Anything can be affected.
Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
That is a good explanati> ad>
apologies, the term I was looking for was setup violation as opposed to metastability. This is where the new data hasn't settled to its final proper value before the next clock cycle comes along, and so its impossible to say what will be registered.
critical path is just another way of saying the register to register path which has the longest timing delay. The critical path could be anywhere in the design and need not be regularly activated, therefore a system could come up but when a certain event with certin inputs occur the setup violation could strike. The resulting effect might be as "minor" as a incorrect calculation but might be as major as locking up a state machine or sytem.
Because it would cost more, and their customers would laugh at them and buy something cheaper.
Because it would be stupid. Only a moron would feed a 600MHz clock to a 400MHz processor and expect it to work reliably. I'm not paying extra for moron-proofing in a processor.
-- Grant Edwards grante@visi.com
They could be. Nobody wants it, so they don't do it.
No it shouldn't. That would add cost to the part. I'd rather get the part cheaper and feed it a proper clock.
-- Grant Edwards grante@visi.com
Hey Edwards, I understand the cost perspective of it.. but i just wanted to know if something can be done about it. Can the processor detect the its feed frequency??
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