DS80C400: PCEs and CEs?

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Perhaps the difference between these signals is too subtle for me but
essentially the above device has 8 chip enables CE[0..7] and 4 peripheral
chip enables PCE[0..3].

What's the difference between then?  I see CEs have the higher priority if
there is an address conflict but that's about it.  What am I missing here?




Re: DS80C400: PCEs and CEs?
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Unless the C400 is wildly different from their other processors, I'd
say PCE? are for XRAM (movx), CE? are for code/movc memory.  You can
combine them to get a von-Neumann memory mapping out of this Harvard
architecture, needed for in-system programming.

--
Hans-Bernhard Broeker ( snipped-for-privacy@physik.rwth-aachen.de)
Even if all the snow were burnt, ashes would remain.

Re: DS80C400: PCEs and CEs?

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peripheral

The user guide mentions that this device can be configured to a von Neumann
style of program and data memory.  The demo board schematics connect the CEs
to the flash and memory devices and the PCE signals aren't used.



Re: DS80C400: PCEs and CEs?


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Fine, as long as you keep in mind that not all real-world applications
will want to work exactly like the demo board.

--
Hans-Bernhard Broeker ( snipped-for-privacy@physik.rwth-aachen.de)
Even if all the snow were burnt, ashes would remain.

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