Hi,
I'm developing a system based on Xilinx MPSoC chip, where multiple function alities are controlled by AXI GPIO blocks. All those GPIO pins are accessible via sysfs interface. However, it is difficult to find the gpio chip and pin numbers from running Linux system. In the HDL design, the GPIO blocks are described by their names, but unfort unately those names are not propagated to the device tree.
For single pins, I have created a solution, that defines the virtual node i n the device tree:
What I need now is something that supports multiple GPIOs and allows to def ine the group of pins like below. (for example assuming that we have a simp le bus with 8-bit address, 8-bit data, read and write strobe, the example s huffles the order of pins to show the required flexibility) In the device tree i can handle it like below:
&amba_pl { multi-gpio { compatible = "wzab,multi-gpio"; data-gpios = , , , , , , , ; address-gpios = , , , , , , , , read-gpios = , write-gpios = , }; }; Of course it would be nice if I could describe the continuous range of GPIO s in a simple way like "data-gpios = ".But the real problem is how to efficently represent it in the driver? It would be perfect, if I could create the node in the sysfs, like /sys/class/multi-gpio/data, then control its direction and set its value li ke a single gpio:
echo out > /sys/class/multi-gpio/data/direction echo 12 > /sys/class/multi-gpio/data/value echo 1 > /sys/class/multi-gpio/write/value echo 0 > /sys/class/multi-gpio/write/value echo in > /sys/class/multi-gpio/data/direction echo 1 > /sys/class/multi-gpio/read/value val=`cat /sys/class/multi-gpio/data/value` echo 0 > /sys/class/multi-gpio/read/value
Is the above a reasonable approach? Are there any existing solutions that c an be used for such purposes?
Thank you very much in advance, With best regards, Wojtek