Digital Crystal Oscillator

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I've read the Green Arrays web page app note on using a pin to turn a
crystal into an oscillator at

http://www.greenarrays.com/home/documents/pub/AP002-OSC.html

Although the work they did seems to work well enough, they stopped
working on the project a long way short of having an actual
oscillator.  I've been trying to run a spice simulation to explore
this concept and finding that an oscillator is not so easy to
design... as I already knew.

Has anyone designed what I would call a digital crystal oscillator
before?  Using Google I didn't find anything that actually uses
digital logic, or in this case software to act as the amplifier of a
crystal oscillator.  Many designs use an inverter as an amplifier,
either from a digital logic chip or contained within a digital chip
like a MCU.  But I can't seem to find any mention of an oscillator
that uses a "kick" from a truly digital controller.

From the simulations I have done, I am finding it hard to create just
the right conditions to make this idea work.  Anyone know anything
about how to make a crystal oscillate using a digital drive
controller?

Rick

Re: Digital Crystal Oscillator

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I started to get lost about half way through your posting. There are plenty
of schematics on the web for 'crystal oscillators' using ICs, both analog
and logic, but the post seems to be referencing something different, more
like the feedback loops that are used with atomic clocks. These keep a
reference cell containing something like Cesium at a resonant point, by some
sort of peak detection principle. It's way more complex than simply closing
a gain loop around the resonant element and letting the whole thing
oscillate by itself. If you need something other than that, you need to
explain exactly what alternative characteristics are important for you. I
can't imagine why a simple oscillator wouldn't suffice unless your
requirements are specialised.



Re: Digital Crystal Oscillator

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Either they never got it working, or they suddenly realized in all their
babbling about "making extra components do their work" that they were
replacing --> one stinking transistor <-- with a bazzilion of them.

From the general tone of the article, either they don't know what the
heck they're doing, or they're _really_ talking down to the audience.  
Their surprise at needing to give a crystal -- famous for being a Really
High Q Device -- lots of cycles of excitation before they see an output
tends to indicate happy ignorance rather than arrogant competence.

If they were driving the pin directly into the crystal at its series
resonant frequency they were probably way over-exciting it.

Making a single-pin crystal oscillator is probably doable.  Particularly
if you're willing to go for the crystal's parallel resonance mode, you
should be able to set up a pure negative resistance at a pin, turn it on,
and stand back.  Figuring out the complications is, of course, left as an
exercise to the reader.

--
http://www.wescottdesign.com

Re: Digital Crystal Oscillator
I didn't know about the leasing, Linnix.  Haven't had time to get to
that point in my reading.  I did think that since it was so cheap that
some may just use the discovery board for small projects.

Say, how did you smoke your board?  Your suggestions may save my two
boards.

Joe



Re: Digital Crystal Oscillator
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I've spent some more time with the simulation looking at alternative
ways to make it work and I'm pretty sure a single pin for stimulation
and observation is not practical.  The problem is that the input
threashold is not set exactly in the center of the power-ground
range.  Any displacement causes the two pushes (positive or negative)
to unbalance and move the bias point in the opposite direction of the
threashold.  With even a modest offset in the threshold the
oscillations end up not crossing the threashold and operation stops.

I'm going to explore a two pin approach.

Rick

Re: Digital Crystal Oscillator
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I don't argue with the need to keep things symmetric.
I had a private exchange with GreenArrays and
Greg Baily literally says:
"At any rate the working oscillator once started is trivial"

This has drawn my attention to a point you seem to have missed.
Look at the document F18 I/O where it says pin wakeup.
You can wait for either polarity change!
So you can wait for it to be up and yank the output one way, and
then you can wait for it to be down and yank it the other way.
This should take care of your unbalance problem.

As others have pointed out the real problem is to get things started
with a higher frequency crystal like 1 Mhz. The Q is too high so that
it is very difficult to hit the exact right frequency.

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I hope you give the one pin another shot.

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Groetjes Albert

--
--
Albert van der Horst, UTRECHT,THE NETHERLANDS
Economic growth -- being exponential -- ultimately falters.
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Re: Digital Crystal Oscillator
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I have described the problem with the single pin drive several times
in this thread as well as multiple times in others.  I can only assume
that either you didn't bother to read that or you read it and don't
understand the details.  I will try to explain it again.

I have already tried the bidirectional "kick".  The crystal is started
with a square wave of a frequency that will put energy into the
crystal sufficient to make it ring to 0.6 volts pp or more when the
square wave is stopped.  The output is then put into the high
impedance state, which must be carefully timed to center the bias
point of the crystal to around half the Vdd voltage.  Otherwise the
crystal voltage can exceed Vdd or Vss and be clamped by the protection
diodes.  From then on the processor is stopped waiting for the crystal
voltage to cross the input threashold (in either direction) at which
point it will drive the I/O pin in the same direction the crystal
voltage is moving.  In my simulations I assume this is done for two
instruction times (3 ns); I suppose it is possible to make this one
instruction time if the needed data and address values are already on
the stack and/or registers.  Each time the input threshold is crossed,
the I/O pin is "kicked" in the appropriate direction.  This is the
simulation model I am using.

The problem I have found when doing all this on a single I/O pin
happens when the input threshold is not at the midpoint of Vdd and
Vss.  In that case, the voltage difference between the I/O pin (and
hence the crystal) and the drive voltage is not the same for each
direction of "kick".  Therefore the amplitude of the "kick" is not
equal.  Unfortunately, the stronger "kick" is in the opposite
direction of the offset in the input threshold.  This pushes the
oscillations away from the threashold until one of two things happen.
Either the oscillations forward bias the protection diodes which
drains power from the crystal, interferring with the oscillations or
the oscillations are not strong enough to overcome the bias and reach
the threshold anymore at which point the oscillations become erratic
or stop entirely.

You can try to add a bias circuit to drag the bias point back near the
center of Vdd and Vss, but that adds a significant load and can only
partially compensate for the offset drive of the uneven "kicks".

If you don't understand this, draw a sine wave centered between Vdd
and Vss.  Then draw the line for the threshold voltage through the
full graph.  The threshold crossings are the points where the "kick"
will be delivered.  Measure the difference in voltage between the sine
wave and the corresponding voltage rail.  You will easily see that
they are not equal.

As long as the threshold is at 0.9 volts, this circuit works
perfectly.  But I don't think digital CMOS inputs are typically
designed to map accurately to the center of Vdd and Vss.  I regularly
see specs of 0.3 to 0.7 * Vdd or even 0.25 to 0.75 * Vdd as the input
threshold range.  I don't know what range actually is found in
production.  But with a threshold of 0.5 volts (~ 0.3 * Vdd) the
simulation won't continue oscillations.

If you still believe I am mistaken, please runs some simulations that
show I am wrong.  Or better yet, get someone to give you a board with
a chip on it and show us a working circuit... by that I mean one that
works in a context of the real world with some sort of temperature,
duty cycle, jitter, etc. specs, not some hobby setup that will work
for that one chip at room temperature, ect.

I won't make any disparaging comments about the GreenArrays people,
but I think the quoted passage above is likely uninformed.  If it
really is so "trivial" to make a fully functional oscillator which
meets some set of defined specifications, then why did the app note
stop so woefully short?   I think it is time that GreenArrays takes
the lead on this; as was posted earlier, hic Rhodus, hic salta.

I will wait for GreenArrays to finish their app note on this.

Rick

Re: Digital Crystal Oscillator
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Experiment trumps theory. As the Green Array folks have it running
this means your simulation is somehow off.

<SNIP>

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I didn't wait, I just contacted them.

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--
--
Albert van der Horst, UTRECHT,THE NETHERLANDS
Economic growth -- being exponential -- ultimately falters.
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Re: Digital Crystal Oscillator
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That must be why their app note shows all the details of how this
circuit works...  If they have it running, why wouldn't they have that
posted?  What exactly do they have running?

BTW, in case you didn't actually read my several postings on the
problem I encountered, understanding the problem has nothing to do
with the Spice simulation.  I was not aware of the issue until I saw
it in the simulation, but the problem is very easily understood if you
know how to add and subtract.  I would like to know exactly how they
are making the circuit work if it is indeed working properly.
Oscillating and oscillating with stability, accuracy, etc are totally
different.

Rick

Re: Digital Crystal Oscillator
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You seem to understand crystals way better than I do.
So I have a few questions below.

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They try to get as near as possible to the resonant frequency
by a software loop, with 2.5 nS resolution for the period.
As you can see, they force the power voltage with a low impedance
directly on the crystal. This is 1.8 V but anyway, 32 kHz crystals
are large and robust (?)

Now do you understand what happens here?
They impose a 1.8 V square wave of 32 Khz resonance directly on the
crystal for slightly more than half a second.
Then they stand back, high impedance mode. Then the voltage
over the crystal builds up taking another 500 mS, before dying out.
The top-top value of this is more than the 1.8V they put in.
(They use a 10 pF scope probe, which is the same order of
capacitance as the crystal's parasitic capacitance, which is another
thing I understand not enough to take into account.)

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This is not just a single pin oscillator. This is one hanging off
a digital output. The rule of the game is to drive at power line
voltages only. You can only pick the moment.

P.S. the GA 144 has a minimum of resistive elements, because
"dissipation wastes energy" as the inventor says.
This is another experiment in this direction. It may be a hobby horse.

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Groetjes Albert

--
--
Albert van der Horst, UTRECHT,THE NETHERLANDS
Economic growth -- being exponential -- ultimately falters.
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Re: Digital Crystal Oscillator
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The most commonly available 32kHz crystals are teeny and fragile.
They're made for watches, and they come in a can that's about 1mm x 6mm.
  They're "tuning fork" crystals, which means that they have a notch
through the thing to lower the resonance and keep the size low.

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No, the article lacks whole bucket loads of clarity and you haven't
supplied much.

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So once they've finished dinking around in the lab and they're ready to
make this thing _sustain_ oscillations, what do they do?

After I wrote the above it did occur to me that you could hit the thing
briefly with excitation, then back off for a while and let it ring, then
hit it, etc.  You could keep the excitation down to a manageable level,
that way.

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If it looks like a duck and quacks like a duck, it's a duck.

It looks like and oscillator and it acts like an oscillator.  Therefor
it's an oscillator.  Never mind that there's software in there mediating
the response -- it's still an oscillator.

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Well, if he wants his chip to actually work as an oscillator with a
crystal on it he can give me a call and I'll make it work -- or tell him
why it can't -- at my usual rates.  Then I'll write up a coherent white
paper that explains _why_ it works, and doesn't leave anyone* thinking
that I'm being arrogant, naive, or dense.

I don't think you _can't_ make this scheme work -- I just question
whether using a few thousand (if it is just a few) transistors to do the
job of one is really going to save power, area, or anything else in the end.

* Well, except for the obligatory few who will walk away from _any_
document thinking that they're better than the world.

--

Tim Wescott
Wescott Design Services
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Re: Digital Crystal Oscillator
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[...]

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If the time step resolution is really 2.5nsec that would result in some
serious phase noise. Also, if you regulary have to "goose it" how would
they maintain longterm accuracy? Dithering like on DFLs in modern uC?

[...]

--
Regards, Joerg

http://www.analogconsultants.com /

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Re: Digital Crystal Oscillator
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I think you'd have to dither the excitation frequency, yes.  Actually,
if you're letting the crystal control the excitation frequency with some
sort of a PLL you _would_ dither the excitation frequency; it's just a
question of how _well_ you dither the excitation frequency, and whether
you do it purposely or just let the loop make it happen.

I'd have to do some analysis first, but I suspect that a 1st-order
delta-sigma modulator would work pretty well -- like this:
http://www.eetimes.com/design/embedded/4006431/Sigma-delta-techniques-extend-DAC-resolution
(http://tinyurl.com/23xuzxq ).  The big question is that if you're phase
locking an RC clock, is it going to vary enough that external dither
will make a difference, or not?

--

Tim Wescott
Wescott Design Services
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Re: Digital Crystal Oscillator
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http://www.eetimes.com/design/embedded/4006431/Sigma-delta-techniques-extend-DAC-resolution


Nice write-up.


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But isn't it that they shun resistors? Then all they'd have is a dither
of the "gooser signal" and if that's quantized to 2.5nsec time slivers
they'll run up to a hard limit. IIUC the purpose is to coax the external
crystal into resonating for as long a time possible. Almost like trying
to make the champagne glasses on the shelf "sing" with just the right
blast from a trumpet :-)

--
Regards, Joerg

http://www.analogconsultants.com /

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Re: Digital Crystal Oscillator
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http://www.eetimes.com/design/embedded/4006431/Sigma-delta-techniques-extend-DAC-resolution
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I got the impression that the chip is run off of an RC clock, or other
"Q-less" multivibrator.

Whatever their main clock is, it can't have crystal stability or they
wouldn't need a crystal.

--

Tim Wescott
Wescott Design Services
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Re: Digital Crystal Oscillator
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This is an asynchronous processor. 2.5 nsec is approximate granularity
time for a software delay loop but that is only used for exciting
the crystal.
If the processor reacts to a level generated by a crystal, jitter is
claimed to be in the picoseconds or less.

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--
--
Albert van der Horst, UTRECHT,THE NETHERLANDS
Economic growth -- being exponential -- ultimately falters.
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Re: Digital Crystal Oscillator
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That I'd want to see :-)

As the ancient forefathers said, hic Rhodos, hic salta. They should put
some spectrum analyzer plots on the table. Claims alone ain't cutting it.

--
Regards, Joerg

http://www.analogconsultants.com /

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Re: Digital Crystal Oscillator
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It doesn't work yet, so it is not a claim, it is what I expected.
Probably too optimistic, indeed. Let's say 300 pS jitter, i.e.
a third of the fastest instruction.

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Groetjes Albert

--
--
Albert van der Horst, UTRECHT,THE NETHERLANDS
Economic growth -- being exponential -- ultimately falters.
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Re: Digital Crystal Oscillator
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Working chips in versions with 24, and 40 core were working
as long as five years ago.    The 24 code models that were put
in USB sticks and given away for a couple of years didn't have
access to I/O pins, but chips have also been on development
boards for about five years.   The 144 core chips in fab today
do have changes from previous designs  and have not
returned from fab to be tested and characterized so specific
performance details for those chips are not yet available.
All that exists for those chips so far are cad simulations,
but those simulations have proved quite accurate over
the years.

300ps is a reasonable estimate of the latency of pin wake
circuit.  The processor goes from full sleep to full speed
within 300ps of an external event on the pin.  This might
vary by as much as percent, and introduce about 3ps
if jitter to the system.

300ps is reasonable estimate for latency but as an estimate
for pin wake jitter it is off by a factor of about 100.  It switches
in about 300ps, speed tends to vary by about 1% not 100%.

Best Wishes

Re: Digital Crystal Oscillator
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Hi Jeff,

I think I have posted this here, but I'm not sure.  I've been running
simulations in Spice to see how a crystal will behave when operated in
a manner similar to this.  One thing I found is that when stimulus and
monitoring is done with one pin, the actual threshold of the input is
important.  Typically this threshold is not well controlled.  CMOS
data sheets typically allow input threshold range to be 25% to 75% of
Vdd or even 20% to 80% of Vdd.  I don't know how much of this range is
actually found in real devices.

Do you have any idea what to expect for the range of input threshold?

Rick

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