Designing for and soldering a tiny BGA

I agree. Being able to click on a part in the schematic and have it highlighted in the PCB layout can save a lot of time. Having changes in part numbers or values communicated automatically between schematic and layout does save many hours. Since I do six to 10=20 layouts per year, it was worth the cost of the PADS system that I'm using. It probably took 50 to 75 hours saved to pay for the software, but that's happened and my stress levels are much lower now. Jobs are going faster now that I have my own templates and libraries for both 2 and 4-layer boards.

Mark Borgerson

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Mark Borgerson
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=A3250 is a bit rich. There are sevices on the web that will provide a stencil squeegee and I think some solder paste for about $100 for small designs. But this is assembly and the OP says he has that taken care of.

Rick

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rickman

How do you check schematic vs PWB? I compare my netlist from schematic to the internal net list of the layout. What else can an integrated tool do for you?

As to the two libraries, that is a non-sequitur. Parts often come in multiple packages and packages are used for many parts. You make it sound like there is a 1 to 1 correspondence which there is not. So even in an integrated design package, the footprint libraries will be separate from the schematic libraries.

I will admit there are some things that are better in an integrated system. But to act like non-integrated systems are from the stone age is a bit absurd. Like I said before, the only place where I found FreePCB lacking is when I want to renumber the parts on a board and have to use back annotation. That has got to be a lot easier on an integrated system. Otherwise, what is easier to do on an integrated system than on a non-integrated one?

Rick

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rickman

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Another form of renumbering is 'gate swopping' and 'pin swopping'. It is _nice_ when the artwork editor knows about multi-part components and can even swop gates (opamps too) that are on different (same type) ICs.

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Rocky

That's what Eagle does, nicely integrated schematic and layout handling. But no hierarchy and once you are past a dozen pages with no top layer sheet the circuit might still be readable to you but not much to others. And you even might have trouble yourself when you revisit it 5-10 years down the road.

I've tried gschem. You can run it nicely in a virtual engine. I use VirtualBox from Sun plus Ubuntu. However, gschem has an IMHO serious problem with reference designators when you need a multi-part chip such as a quad opamp with the supplies piped out and not inherently connected to VDD/VEE.

KiCad came close to ideal but for some reason that completely eludes me it has an ugly schematic frame hardcoded it. I've also still got DOS-OrCad and was thinking about a Windows version but they crashed a bit much on me at clients, plus out of principle I do not like the forec-feeding of a service contract where I never needed one.

Let's hope they last. I've seen cases where BGAs worked initially but then some failed in the field.

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Joerg

An integrated tool does not eliminate a manual netlist check. I had netlists contain serious bugs in those while isueing no warnings.

What is easier is to change a part in hindsight without having to do the whole netlist rigamaroo again. Like when you are 80% through the layout, the purchasing guy comes down the hallway and says "I can't get ...". Other than that, since I am not doing layouts I always end up with separate systems because my layouter uses PADS. Works fine.

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Joerg

On Sun, 12 Apr 2009 15:18:08 -0700, Joerg wrote: [snippety...]

You do know that you can overwrite the default frame with your own (granted, it looks un-aesthetic) and then uncheck the print option "print frame ref" to make the default frame disappear from the output? Or, just uncheck it and get the bare schematic w/o any frame.

Make up a blank schematic with just your boilerplate frame for a given paper size and you can "save block" (not "copy block," for some reason) and then paste it when you're ready to print.

Now, if there were just a checkbox to show/not show the default frame during editing...

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Rich Webb     Norfolk, VA
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Rich Webb

... snip ...

You obviously weren't around in the days of light tables and tape. PC layout is so easy these days.

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CBFalconer

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Yes, but how many devices do you use that actually have equivalent sections to be swapped? I guess I shouldn't make that argument. I used several devices on my last board with swappable sections although I didn't miss the swap function. I guess in my case I relied more on swapping the signal at the FPGA end of the trace.

Rick

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rickman

I'm confused. I thought this was about an integrated schematic/layout tool vs. separate tools? If your netlist is bad, then you are hosed no matter what tools you are using. The only way to get a bad netlist, that I know of, is to enter a bad schematic (which you can do with some programs) or for the program to have a bug.

What exactly is your point?

I found back annotation to be inconvenient, but not unworkable. FreePCB would let you import a netlist to an existing layout and you could find differences. If a part number had changed, it would remove that part from the layout and unroute the traces from it. That would be a PITA. So before reloading the netlist, I would renumber the parts in FreePCB to match the schematic. Then an import would run without finding changes and verify that the schematic and layout still match. To renumber the entire board (to get the passives in some semblance of location) was tedious work, but then I didn't find much about layout that wasn't tedious.

There has been talk of supporting back annotation with a change list format which seems to already be supported by a number of schematic programs. I'm not sure where that stands at the moment.

Rick

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rickman

Were the failures related to the solder joints? I can't believe BGAs are inherently unreliable since so many are used in cell phones, PDAs and other portable devices which are subject to lots of abuse. Actually, I am looking more at QFN devices. But again, there is potential for solder problems with the lack of the compliance of the leads.

Rick

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rickman

Mostly bugs I suspect. With Eagle this is what happened last time: Block copy of output circuitry that had to be repeated 11 times. Looked great on the schematic, no warning about strange net connections yet the program "forgot" to reassign new nets on every instantation. Had I not caught that in the manual netlist check this would have resulted in a loud bang. So, as long as I live I'll do it by hand, with highlighter, cup of coffee, the usual.

My point is that an integrated tool does not necessarily solve the netlist bug problem.

That can be a breeze with integrated tools. Click ... zzzip .. done.

That would be good. Some programs have routines that can do that with PADS, but probably because that is one of the most popular layout packages in the US.

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Joerg

Hey, thanks, I am going to try that! I had asked this in the KiCad NG but got no answers. So far that's the only shortcoming I've found in KiCad but when I found this frame issue I had completely stopped evaluating it.

Oops, so you have to cram your own frame on top of the ugly KiCad frame and look at both mushed together all the time?

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Joerg

Yes, solder joints coming off. Flex the board, circuit behavior changes. Flex it again, behavior changes again but this time differently. I try to avoid BGA whenever possible. Same for other leadless packages unless on alumina hybrids. Leadless (of any kind) combined with naturally flexible FR-4 just doesn't look like such a great idea to me. Then again, much of the stuff I design is hi-rel. If a cell phone fails, oh well. If a monitoring device fails in the middle of a medical procedure, whoops ...

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Joerg

You forgot to mention razor blades and the first aid kit :-)

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Joerg

Not necessarily. Your own drawn border should be able to stay with the schematic w/o looking too kludgy, it's the title block that would look odd. So, just do the title block on a separate sheet, anywhere on the sheet, and save block + paste block onto the target schematic when you're ready to print.

If you don't make any other changes to the schematic between pasting and printing then you can clean it with an undo. Otherwise, a normal ctrl-shift-drag deletes it.

It's *kind* of a feature, since I can decorate the default title block with rcs $Revision$ tags and so on but drop a clean title block for printing.

Would be awfully nice to be able to hide it on the screen, though ...

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Rich Webb     Norfolk, VA
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Rich Webb

[getting rid of the KiCad frame]

I just tried it. Works. Thanks!

Yes, and I do not understand why it was ever hardcoded in. It just doesn't make sense.

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Joerg

Leaves one small issue: This trick doesn't work in plot when you want to export something to include in, say, a MS-Word document. Maybe I could use a routine similar to PDFCreator except that it creates PNG or some other popular format. I've seen some in the past and they weren't very expensive.

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On Mon, 13 Apr 2009 12:10:01 -0700, Joerg wrote: [snippety...]

erm... Why not just print to the PDFCreator printer? That gives you PNG or JPG or BMP or ... If you haven't played with it, going to the "start menu version" of PDFCreator gives you access to a cubic butt-ton of options, including a variety of output formats. You'll get a small window; go to the Printer | Options menu item then look under the Program | Save option. The various output formats can be tweaked under the Formats tab.

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Rich Webb     Norfolk, VA
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Rich Webb

Interesting, thanks. I looked and yes, it does have PNG but only under the standard save format. Meaning it then would have to be reconfigured every time I want to print PDF. Maybe I can install a 2nd copy, rename it and leave that on PNG.

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