delay in altera cyclone about led

Dear all i write a simple test for led on altera cyclone board by jtag protocol

such as following: led[0] will shine with some frequence

reg [31:0] temp_count=0; reg direction=1;

parameter delay=23'h600000; always @( posedge clock)begin if(direction==1)begin temp_count=temp_count+1'b1; LED[0]=1; if(temp_count>=delay) begin direction=0; end end if(direction==0) begin temp_count=temp_count-1'b1; LED[0]=0; if(!(temp_count>0)) begin direction=1; end end end it did work after "few minutes" why it took "few minutes" to perform well, after i bured code into fpga completely thanks for reply

Sincerely Chronoer

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chronoer
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