CPLD + SRAM == Cheap BiDir FIFO (albiet... slow)

Does anybody have a link to VHDL code to transform say... XC9572 & CY7C1399 into a 'slow' Dual 16Kx8 FIFO (for about $3.65 in Qty 100)

IDT's stuff is too $$$$ and I don't really need the 'instantaneous' simultaneous access from "both sides"... handshaking with ready/done deal is good enough.